XRT86L30 datasheet(70/279 Pages) EXAR

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XRT86L30

SINGLE T1/E1/J1 FRAMER/LIU COMBO

REV. 1.0.0

TABLE 43: GAPPED CLOCK CONTROL REGISTER

GAPPED CLOCK CONTROL REGISTER (GCCR)

HEX ADDRESS: 0X011E

BIT

FUNCTION

TYPE

DEFAULT

DESCRIPTION-OPERATION

FrOutclk

R/W

Framer Output Clock Reference

By default, the output clock reference on T1OSCCLK and

E1OSCCLK output pins is 1.544MHz/2.048MHz respectively. By

setting this bit to a “1”, the output clock reference is 49.408MHz/

65.536MHz for T1/E1 respectively.

0 = Standard T1/E1 Rate

1 = High-Speed Rate

[6:2] Reserved

These bits are reserved

TxGCCR

R/W

Transmit Gapped Clock Interface

This bit is used to select a gapped clock interface operating at

2.048Mbit/s in DS-1 mode. In this application, 63 gaps (missing

data) are inserted so that the overall bit rate is reduced to 1.544Mbit/

s. (In this mode, TxMSYNC is used as the 2.048MHz Gapped Clock

Input. TxSER is used as the 2.048MHz Gapped Data Input.

TxSERCLK must be 1.544MHz.)

0 = Disabled

1 = Transmit gapped clock for the Transmit Path

RxGCCR

R/W

Receive Gapped Clock Interface

This bit is used to select a gapped clock interface operating at

2.048Mbit/s in DS-1 mode. In this application, 63 gaps (missing

data) are inserted so that the overall bit rate is reduced to 1.544Mbit/

s. (In this mode, RxSERCLK should be configured as an input so

that a 2.048MHz Gapped Clock can be applied to the Framer block.

RxSER is used as the 2.048MHz Gapped Data Output. The posi-

tion of the gaps will be determined by the gaps placed in RxSER-

CLK by the user.)

0 = Disabled

1 = Receive gapped clock for the Receive Path

TABLE 44: GAPPED CLOCK CONTROL REGISTER

MULTIPLEXED ()

HEX ADDRESS: 0X011F

BIT

FUNCTION

TYPE

DEFAULT

DESCRIPTION-OPERATION

7:2 Reserved

R/W

Reserved

1:0 MHSCCR[1:0]

R/W

Multiplexed High-Speed Channel Control

These bits are used to select which channel (the channel position

can be chosen from 1 of 4 different time slots) within the High-Speed

serial data is to be processed by the framer. The other three chan-

nels will be don’t care bits, since this is a single channel device.

This allows the XRT86L30 to be compatible with High-Speed modes

such as HMVIP/H.100, etc.

00 = Channel 0

01 = Channel 1

10 = Channel 2

11 = Channel 3

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