SP6120EYSLASHTR datasheet(18/22 Pages) SIPEX

18 / 22 page

Date: 1/21/05

SP6120 Low Voltage, AnyFETTM, Synchronous, Buck Controller

Current Sense

The SP6120 allows sensing current using the

inductor, PCB trace or current-sense resistor.

Inductor-sense utilizes the voltage drop across

the ESR of the inductor, while PCB trace and

current-sense resistor introduce additional re-

sistance in series with the inductor. The resis-

tance of the sense element determines the

overcurrent protection threshold as follows,

ILIM = 43mV

RSEN

RSEN = current-sense resistance which can be

implemented as ESR of the inductor, trace or

discrete resistor.

The maximum power dissipation on the current-

sense element is:

SEN

OUT

SEN

(max)

For the inductor-sense scheme shown in the

application circuit, RS and CS are used to repli-

cate the signal across the ESR of the inductor. RS

and CS can be looked at as a low pass filter

whose output represents the DC differential

voltage between the switch node and the output.

At steady state, this voltage happens to be the

output current times the ESR of the inductor. In

addition, if the following relationship is satisfied,

= R

SCS

ESR

the output of the RsCs filter represents the exact

voltage across the ESR, including the ripple.

Since the SP6120’s hiccup overcurrent protec-

tion scheme is intended to safeguard sustained

overload conditions, the DC portion of the cur-

rent signal is more of interest. Therefore, design-

ing the RSCS time constant higher than L/ESR

provides reliable current sense against any pre-

mature triggering due to noise or any transient

conditions. Pick Rs between 10k and 100k, and

Cs can be determined by:

S = 2

ESR R

Here the time constant of RSCS is twice the value

of L/ESR.

In Figure 18, R1 and C1 provides a zero fZ1

which needs to be placed at or below fP(LC). If fZ1

is made equal to fP(LC) for convenience, the

value of C1 can be calculated as

1 =

πf

P(LC)R1

The optional C2 generates a pole fP1 with R1 to

cut down high frequency noise for reliable op-

eration. This pole should be placed one decade

higher than the crossover frequency to avoid

erosion of phase margin. Therefore, the value of

the C2 can be derived from

2 =

πf

COR1

Figure 19 illustrates the overall loop frequency

response and frequency of each pole and zero.

To fine-tune the compensation, it is necessary to

physically measure the frequency response us-

ing a network analyzer.

Gain

-20db/dec

-40db/dec

-20db/dec

Error Amplifier

Loop

fZ1 fP(LC) fZ(ESR)

fCO

fP1

Figure 19. Frequency response of a stable system and its

error amplifier.

APPLICATIONS INFORMATION: Continued

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