SAA7151 datasheet(8/49 Pages) PHILIPS

8 / 49 page

April 1993

Philips Semiconductors

Product speciﬁcation

Digital multistandard colour decoder with

SCART interface (DMSD2-SCART)

SAA7151B

For matrixed RGB signals - the full screen SCART mode

and the fast insertion mode (blanking/switching) are

selectable. The chrominance stop filter is automatically

bypassed in full screen SCART mode.

Full screen RGB mode (SCART):

The CUV digital input signal (7-0) consists of

time-multiplexed samples for U and V. An offset correction

for both signals is applied to correct external clamping

errors. An internal timing correction compensates for slight

differences in timing during sampling. The U and V signals

are delay-compensated and fed to the output formatter.

The format 4:2:2 or 4:1:1 is generated by a switchable

filter.

The control signals for the front end (Figures 3 and 20)

MUXC, status bits FSST1, FSST0 (outputs GPSW2,

GPSW1) and FSO are generated by the SAA7151B.

Table 1

SCART interface control (Fig.3)

MODE

CONNECTION

chroma

output of

TDA8446

to TDA8709A

TDA8709A

luminance

fast switch

TDA8446

input

selector (via

I2C-bus)

TDA8540

FSO GPSW 2

GPSW 1 MUXC

selected

input

CUV

(7-0)

RGB

only

high-Z

VIN2

U/V

sync (RGB)

Y/C or

CVBS

only

VIN1

Y (Y/C) or CVBS

Y (Y/C) or

CVBS

Fast

switch

VIN2

0.5(C

+U)/

0.5(C

+V)

Y (Y/C) or CVBS

Y (Y/C) or

CVBS

not used

RGB

only

high-Z

VIN2

U/V

Y (RGB)

sync (RGB)

not used

Fast

switch

VIN2

0.5(C

+U)/

0.5(C

+V)

Y (RGB)

Y (Y/C) or

CVBS

not used

Fast insertion mode:

Fast insertion is applied by FSI pulse to ensure correct

timing. The RGB source signal is matrixed into UV and

inserted into the CVBS or Y/C source signal after two field

periods if FSI pulses are received. The output FSO is set

to HIGH during a determined insertion window (screen

plain minus 6 % of horizontal and vertical deflection).

Switch over depends on the phase of FSI in relation to the

valid pixel sequence depending on the phase-different

weighting factors. They are applied to the original and the

inserted UV data (Figures 6 and 7)

The control signals for the front end (Table 1) MUXC, FSO,

status bits FSST1 and FSST0 (outputs GPSW2 and

GPSW1) are generated by the SAA7151B.

The amplitude of chrominance and colour-difference

signals are scaled down by factor 2 to avoid overloading of

the chrominance analog-to-digital converter. The

amplitudes are reduced in the TDA8446 by signals on lines

GPSW2 and GPSW1.

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