2001 Aug 31

7

Philips Semiconductors

Product specification

Single chip DVB-S/DSS channel receiver

TDA10085HT

Notes

1. TTL, 5 V tolerant input (if VDDE5 is connected to 5 V).

2. DGND, VSSI and VSSE can be connected to the same ground plane.

TDO

41

I/O

boundary scan mode: test data serial output; output provided on the

falling edge of TCK

serial mode enabled (ENSERI = 1): serial TS enable input; must be

set to VSS when not in serial mode

ADVD

42

supply

analog supply voltage for the 2nd PLL (typically 1.8 V)

ADVS

43

ground

analog ground voltage for the 2nd PLL

VDDE

44

supply

digital supply voltage (typically 3.3 V)

VSSE

45

ground

digital ground voltage; see note 2

CLB#

46

I

asynchronous, active LOW input that clears the TDA10085; when

CLB# goes LOW the circuit immediately enters its RESET mode and

normal operation resumes three XIN rising edges later after CLB#

initialized to their default values; the minimum width of CLB# LOW

level is three XIN clock periods; pin CLB# is not TTL, 5 V tolerant

PSYNC

47

O

packet sync output signal goes HIGH on a rising edge of OCLK each

time the first byte of a packet is provided

UNCOR

48

O

uncorrectable packet output signal goes HIGH on a rising edge of

OCLK when the packet provided is uncorrectable

DEN

49

O

data enable; this output signal is HIGH when there is valid data on

bus DO[7:0]

OCLK

50

O

output clock for the parallel DO[7:0] outputs; OCLK is generated

internally and depends on which interface type is selected

DO0

51

O

transport stream data output bits; part of the 8-bit parallel data output

after demodulation, Viterbi decoding, de-interleaving, RS decoding

and de-scrambling; possible output interfaces are three parallel and

two serial

DO1

52

O

DO2

53

O

DO3

54

O

VDDI

55

supply

digital core supply voltage (typically 1.8 V)

VSSI

56

ground

digital core ground voltage; see note 2

VDDE

57

supply

digital supply voltage (typically 3.3 V)

VSSE

58

ground

digital ground voltage; see note 2

DO4

59

O

transport stream data output bits; part of the 8-bit parallel data output

after demodulation, Viterbi decoding, de-interleaving, RS decoding

and de-scrambling; possible output interfaces are three parallel and

two serial

DO5

60

O

DO6

61

O

DO7

62

O

22K

63

O

22 kHz output used to control the antenna LNB (output is controlled

VSSI

64

ground

digital core ground voltage; see note 2

SYMBOL

PIN

TYPE

DESCRIPTION