Advance Information

512 Kbit / 1 Mbit / 2 Mbit 1.8V SPI Serial Flash

SST25WF512 / SST25WF010 / SST25WF020

29

©2006 Silicon Storage Technology, Inc.

S71328-01-000

02/07

PACKAGING DIAGRAMS

FIGURE 30: 8-Lead Small Outline Integrated Circuit (SOIC)

SST Package Code: SA

TABLE 19: Revision History

Number

Description

Date

00

•

Initial release of data sheet

Nov 2006

01

•

Removed “Commercial” Temperature Range

•

Added references to Tables 6 and 7 in “Block-Protection (BP1, BP0)” on page 8

•

Modified EWSR and WREN footnote information and updated EBSY Op Code

Cycle in Tables 8 and 9

•

Re-phrased first paragraph in “Instructions” on page 9

•

Updated “Byte-Program” on page 12

•

Clarified SO pin statement in second paragraph of “Hardware End-of-Write Detec-

tion” on page 13

•

Added Industrial (extended) values to Operating Range in “Electrical Specifica-

tions” on page 21

•

Added “Power-Up Specifications” on page 22

•

Added typical values to Table 15 on page 24

•

Added contact-lead composition, updated minimum endurance from 10,000 to

100,000 cycles, and changed product valid combinations in “Product Ordering

Information” on page 28

Feb 2007

08-soic-5x6-SA-8

Note: 1. Complies with JEDEC publication 95 MS-012 AA dimensions,

although some dimensions may be more stringent.

2. All linear dimensions are in millimeters (max/min).

3. Coplanarity: 0.1 mm

4. Maximum allowable mold flash is 0.15 mm at the package ends and 0.25 mm between leads.

TOP VIEW

SIDE VIEW

END VIEW

5.0

4.8

6.20

5.80

4.00

3.80

Pin #1

Identifier

0.51

0.33

1.27 BSC

0.25

0.10

1.75

1.35

7°

4 places

0.25

0.19

1.27

0.40

45°

7°

4 places

0°

8°

1mm

Silicon Storage Technology, Inc. • 1171 Sonora Court • Sunnyvale, CA 94086 • Telephone 408-735-9110 • Fax 408-735-9036

www.SuperFlash.com or www.sst.com