AMIS-710400-A4: 400dpi CIS Module

Data Sheet

8.0 Switching Characteristics (25

Figure 3: Module Timing Diagram

he switching characteristics (at 25°C) for the I/O clocks are shown in Figure 3. For the timing symbol definitions see Table 6.

able 6: Timing Symbol's Definition and Timing Values

T

T

Item

Symbol

Min.

Typ.

Max.

Units

Clock cycle time

to

0.20

2.0

µs

Clock pulse width

tw

50

ns

Clock duty cycle

25

75

%

Prohibit crossing time of SP

(1)

tprh

0

ns

Data setup time

tds

20

ns

Data hold time

tdh

0

ns

Signal delay time

tdl

20

ns

Signal settling time

tsh

100

ns

Note:

it crossing of star

"Prohib

t pulse" is to indicate that the

art pulse should no

e active high betw

two consecutive high going clock pulses or two consecutive low going

st

t b

een any

clock pulses (see Figure 3). Only one high going clock under the active high start pulse initiates the internal shift register, and it must not be active over two high going clocks.

All low going clock pulses will not initiate the shift register, but to ensure that the start pulse will not be actively high during two consecutive high going clocks, the circuit should

be designed to keep the start pulse active only for one low going clock cycle.

5

AMI Semiconductor – July 06, M-20587-001

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