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AD8158 Datasheet(PDF) 9 Page - Analog Devices

Part # AD8158
Description  6.5 Gbps Quad Buffer Mux/Demux
PDF  36 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

AD8158 Datasheet(HTML) 9 Page - Analog Devices

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AD8158
Rev. B | Page 9 of 36
Pin No.
Mnemonic
Type
Description
95
SEL3
Control1
Lane 3 A/B Switch Control
96
SEL2
Control1
Lane 2 A/B Switch Control
97
SEL1
Control1
Lane 1 A/B Switch Control
98
SEL0
Control1
Lane 0 A/B Switch Control
99
BICAST
Control1
Enable Bicast Mode for Port A and Port B Outputs, Active
High
100
SEL4G
Control1
Set Transmitter for Low Speed PE, Active High
1 Logic level of control pins referred to DVCC.
2 EQ control pins (EQ_A[1:0], EQ_B[1:0], EQ_C[1:0]) require 5 kΩ in series when DVCC > VCC.



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