Data Sheet

AD5124/AD5144/AD5144A

TABLE OF CONTENTS

analog.com

Rev. E | 2 of 37

Features................................................................ 1

Applications........................................................... 1

Functional Block Diagram......................................1

General Description...............................................1

Functional Block Diagrams—TSSOP.................... 3

Specifications........................................................ 4

Electrical Characteristics—AD5124................... 4

Electrical Characteristics—AD5144 and

AD5144A.......................................................... 7

Interface Timing Specifications........................ 10

Shift Register and Timing Diagrams.................12

Absolute Maximum Ratings.................................14

Thermal Resistance......................................... 14

Electrostatic Discharge (ESD) Ratings.............14

ESD Ratings for AD5124/AD5144/AD5144A... 14

ESD Caution.....................................................14

Pin Configurations and Function Descriptions.....15

Typical Performance Characteristics................... 18

Test Circuits......................................................... 23

Theory of Operation.............................................24

RDAC Register and EEPROM......................... 24

Input Shift Register...........................................24

Serial Data Digital Interface Selection, DIS......25

SPI Serial Data Interface..................................25

I2C Serial Data Interface.................................. 27

Advanced Control Modes.................................30

EEPROM or RDAC Register Protection...........33

Load RDAC Input Register (LRDAC)............... 33

RDAC Architecture........................................... 33

Programming the Variable Resistor..................34

Programming the Potentiometer Divider.......... 34

Terminal Voltage Operating Range.................. 35

Power-Up Sequence........................................ 35

Layout and Power Supply Biasing....................35

Outline Dimensions............................................. 36

Ordering Guide.................................................36

RAB (kΩ), Resolution, and Interface Options....36

Evaluation Boards............................................ 37

REVISION HISTORY

7/2024—Rev. D to Rev. E

Changed Master to Controller and Slave to Target (Throughout).................................................................... 1

Changes to Thermal Resistance Section and Table 8................................................................................... 14

5/2022—Rev. C to Rev. D

Changes to Nominal Resistance Match Parameter, Single-Supply Power Range Parameter, Dual-

Supply Power Range Parameter, and Logic Supply Range Parameter, Table 2........................................... 4

Changes to Nominal Resistance Match Parameter, Single-Supply Power Range Parameter, Dual-

Supply Power Range Parameter, and Logic Supply Range Parameter, Table 3........................................... 7

Deleted FICDM Parameter, Table 7............................................................................................................... 14

Added Electrostatic Discharge Ratings Section.............................................................................................14

Added ESD Ratings for AD5124/AD5144/AD5144A Section and Table 9; Renumbered Sequentially......... 14

Moved Table 13 and Table 14........................................................................................................................24

Added Write Operation Section, Figure 46, and Figure 47; Renumbered Sequentially.................................27

Added EEPROM Write Acknowledge Polling Section................................................................................... 29

Added Read Operation Section and Figure 48.............................................................................................. 29

Moved Table 17, Table 18, and Table 19....................................................................................................... 30

Added RAB (kΩ), Resolution, and Interface Options Section......................................................................... 36