www.powerint.com

B

12/02

DI-31

WORLD HEADQUARTERS

AMERICAS

Power Integrations, Inc.

San Jose, CA 95138 USA

Customer Service:

Phone:

+1 408-414-9665

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CHINA

Power Integrations International

Holdings, Inc.

China

Phone:

+86-755-8367-5143

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+86-755-8377-9610

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SINGAPORE

Power Integrations, Singapore

Republic of Singapore 308900

Phone:

+65-6358-2160

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+65-6358-2015

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Power Integrations, K.K.

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Japan

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+81-45-471-1021

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+81-45-471-3717

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EUROPE & AFRICA

Power Integrations (Europe) Ltd.

United Kingdom

Phone:

+44-1344-462-300

Fax:

+44-1344-311-732

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KOREA

Power Integrations

International Holdings, Inc.

Seoul, Korea

Phone:

+82-2-782-2840

Fax:

+82-2-782-4427

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TAIWAN

Power Integrations

International Holdings, Inc.

Taipei, Taiwan

Phone:

+886-2-2727-1221

Fax:

+886-2-2727-1223

e-mail: taiwansales@powerint.com

INDIA (Technical Support)

Innovatech

Bangalore, India

Phone:

+91-80-226-6023

Fax:

+91-80-228-9727

e-mail: indiasales@powerint.com

APPLICATIONS HOTLINE

APPLICATIONS FAX

World Wide +1-408-414-9660

World Wide +1-408-414-9760

Table 1. Transformer Design Parameters.

For the latest updates, visit our Web site: www.powerint.com

Power Integrations reserves the right to make changes to its products at any time to improve reliability or manufacturability.

Power Integrations does not assume any liability arising from the use of any device or circuit described herein, nor does it convey any

license under its patent rights or the rights of others. The products and applications illustrated herein may be covered by one or more U.S.

and foreign patents or potentially by pending U.S. and foreign patent applications assigned to Power Integrations. A complete list of Power

Integrations’ patents may be found at www.powerint.com.

The PI Logo, TOPSwitch, TinySwitch, LinkSwitch and EcoSmart are registered trademarks of Power Integrations, Inc.

PI Expert is a trademark of Power Integrations, Inc. ©Copyright 2002, Power Integrations, Inc.

Figure 2. Efficiency vs. Output Power.

•Minimize primary and secondary high current loop areas

to reduce parasitic inductance.

• Optocoupler U2 should have a controlled CTR range of

100 to 200% for optimum loop stability.

• Size transformer reset components to ensure transformer

reset at minimum operating voltage without exceeding

170 V drain voltage at high line. It may be necessary to gap

T1 to offset effect of Q4-Q6 gate capacitance.

• Set Zener VR1 clamp voltage to 150 V to both safely limit

the DRAIN below BV

• Select number of bias turns to provide 12 V to 14 V at

minimum input voltage and full load.

•Main primary power return should be connected to the

DPA-Switch tab, not to the SOURCE pin.

• Scale time constant of C9 and L2 to allow C9 to reset

completely during minimum on-time conditions.

• Consult AN-31 for additional design tips and information.

Table 2. Output Inductor Construction Information.

92

88

86

90

0

20

40

60

80

Output Power (W)

80

82

84

TRANSFORMER PARAMETERS

Core Material

EFD25, 3F3

Gap for A

2

Bobbin

EFD25 10 pin

(B&B B-025 or equivalent)

Winding Details

Bias: 5T, 30 AWG

Primary: 6T+ 5T, 4 x 26 AWG

Secondary: 3T, 0.005" Cu foil

Inductance

Primary: 130 µH ±10%,

Leakge: 10 µH (max)

Primary Resonant

Frequency

3 MHz (minimum)

Winding Order

(Pin Numbers)

Primary (3-2), tape, Bias (4-5), tape,

Secondary (6,7-9,10), tape,

Primary (2-1), tape

OUTPUT INDUCTOR PARAMETERS

Core

EE22, TDK PC40 Material

Gap for A

2

Bobbin

TDK BE-22-5116

Winding Details

4T, 0.016" Cu foil

Inductance

4 µH ± 10%