Design Idea DI-37

16.5 W DC-DC Converter

Design Highlights

• Low cost

• 400 kHz synchronous rectification design

• Low component count

• Efficiency – 87% at 48 VDC

• No current sense resistor or current transformer

required

• Output overload, open loop and thermal protection

• Integrated UV meets ETSI standard

Operation

DPA-Switch

greatly simplifies the design compared to a

discreteimplementation. ResistorR1programstheunder/over

voltages and linearly reduces the maximum duty cycle with

input voltage to prevent core saturation during load transients.

Resistor R3 programs the DPA-Switch current limit to 60%

of nominal to limit fault and overload power. Drain voltage

clamping is provided by Zener diode VR1. Transformer core

reset is controlled by the gate capacitance of Q1.

Resistor R15 charges the gate of Q2, the forward synchronous

rectifier MOSFET. The catch synchronous rectifier MOSFET

(Q1) is directly driven by the transformer (T1) reset voltage and

operates only when Q2 is off. Diode D2 provides a conduction

path for the output inductor (L2) current when the transformer

reset is complete.

www.powerint.com

Figure 1. DPA424R–16.5 W, 3.3 V, 5 A DC-DC Converter.

DI-37

July 2004

Application

Device

Power Output

Input Voltage

Output Voltage

Topology

Telecom

DPA424R

16.5 W

36-75 VDC

3.3 V

Forward Sync. Rec.

U1

DPA424R

D1

BAV

19WS

D2

B540C

C5

220 nF

VR1

SMBJ

150

C6

68

µF

10 V

C7

1 nF

1.5 kV

R14

10

Ω

T1

R3

11.1 k

Ω

1%

R1

619 k

Ω

1%

R4

1.0

Ω

C11

100

µF

6.3 V

C12

100

µF

6.3 V

C13

1

µF

0805

36-75 VDC

L1

1

µH

2.5 A

L2

C1, C2

1

µF

100 V

D

L

S

X

F

C

U2

PC357N1T

PI-3650-072004

DPA-Switch

3.3 V, 5 A

RTN

Q2

Si4800

DY

R15

10

Ω

C10

100

µF

6.3 V

Q1

Si4800

DY

C4

4.7

µF

20 V

U2

D3

BAV19WS

U3

LM431AIM3

R9

220

Ω

R11

10.0 k

Ω

1%

R10

3.24 k

Ω

1%

R12

5.1

Ω

R7

10 k

Ω

C14

1

µF

C15

10

µF

10 V

C16

100 nF

R6

150

Ω

+

CONTROL

CONTROL