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DI-37 Datasheet(PDF) 2 Page - Power Integrations, Inc. |
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DI-37 Datasheet(HTML) 2 Page - Power Integrations, Inc. |
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2 / 2 page ![]() www.powerint.com DI-37 B 7/04 Power Integrations 5245 Hellyer Avenue San Jose, California 95138 MAIN PHONE NUMBER APPLICATIONS HOTLINE APPLICATIONS FAX For a complete listing of worldwide sales offices, +1 408-414-9200 +1 408-414-9660 +1 408-414-9760 please visit www.powerint.com The PI logo, TOPSwitch, TinySwitch, LinkSwitch and EcoSmart are registered trademarks of Power Integrations. PI Expert and DPA-Switch are trademarks of Power Integrations. Copyright 2004, Power Integrations Power Integrations may make changes to its products at any time. Power Integrations has no liability arising from your use of any information, device or circuit described herein nor does it convey any license under its patent rights or the rights of others. POWER INTEGRATIONS MAKES NO WARRANTIES HEREIN AND SPECIFICALLY DISCLAIMS ALL WARRANTIES INCLUDING, WITHOUT LIMITATIONS, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, AND NON-INFRINGEMENT OF THIRD PARTY RIGHTS. The products and applications illustrated herein (including circuits external to the products and transformer construction) may be covered by one or more U.S. and foreign patents or potentially by pending U.S. and foreign patent applications assigned to Power Integrations. A complete list of Power Integrations' patents may be found at www.powerint.com. For the latest updates, visit www.powerint.com Table 1. Transformer Design Parameters. TRANSFORMER PARAMETERS Core Material Epcos P/N: P 14 x 8 N87, ungapped Bobbin 8-pin P 14 x 8 surface mount bobbin Winding Details Primary 10T + 10T, 1 x 26 AWG 3.3 V, 4 x 26 AWG Winding Order and Pin Numbers Primary-1 (4-NC), 3.3 V (5-6), Primary-2 (NC-1) Primary Inductance 600 µH ±25% at 400 kHz Primary Resonant Frequency 3.8 MHz (minimum) Leakage Inductance 1 µH (maximum) Key Design Points • Transformer core reset is critical in this design. MOSFET gate loading will affect the transformer reset waveform. Capacitor C Q1gs will load transformer reset. Choose Q1 MOSFET such that C Q1gs provides sufficient reset at low line and safe maximum drain voltage at high line. • Choose synchronous rectifier MOSFETs which have both low R DS(ON) and also low Qg (combination of gate charge Q gs and Miller capacitance Qgd). • Reduce transformer leakage inductance by filling each winding layer across the entire width of the bobbin. • Choose a low-drop Schottky diode (such as Vishay SL44 – V f = 0.42 V), to increase high line efficiency. • Choose a larger DPA-Switch to increase efficiency at low and medium input voltages. INDUCTOR PARAMETERS Core Material Epcos P/N: P 14 x 8 N87, gap for inductor Bobbin 8-pin P 14 x 8 surface mount bobbin Winding Details Main 10T, 2 x 24 AWG Bias 30T, 1 x 32 AWG Winding Order and Pin Numbers Main (7,8-5,6) Bias (1-2) Inductance Pin (7,8-5,6): 16 µH ±10% at 400 kHz Table 2. Inductor Design Parameters. |
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