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ADIN2111BCPZ-R7 Datasheet(PDF) 83 Page - Analog Devices |
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ADIN2111BCPZ-R7 Datasheet(HTML) 83 Page - Analog Devices |
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83 / 129 page  Data Sheet ADIN2111 REGISTERS analog.com Rev. A | 83 of 129 Table 130. Bit Descriptions for P2_RX_CRC_ERR_CNT Bits Bit Name Description Reset Access [31:0] P2_RX_CRC_ERR_CNT Rx CRC Errored Frame Count. 0x0 R P2 Rx Align Error Count Register Address: 0xD5, Reset: 0x00000000, Name: P2_RX_ALGN_ERR_CNT Table 131. Bit Descriptions for P2_RX_ALGN_ERR_CNT Bits Bit Name Description Reset Access [31:0] P2_RX_ALGN_ERR_CNT Rx Align Error Count. 0x0 R P2 Rx Long/Short Frame Error Count Register Address: 0xD6, Reset: 0x00000000, Name: P2_RX_LS_ERR_CNT Table 132. Bit Descriptions for P2_RX_LS_ERR_CNT Bits Bit Name Description Reset Access [31:0] P2_RX_LS_ERR_CNT Rx Long/Short Frame Error Count. 0x0 R P2 Rx PHY Error Count Register Address: 0xD7, Reset: 0x00000000, Name: P2_RX_PHY_ERR_CNT This counter does not increment on LES because a PHY error cannot be determined via the reduced media independent interface (RMII). Instead, PHY errors are seen as CRC errored frames in the MAC. The PHY error counter on the PHY must be read to determine if there are PHY errors on Port 2. Table 133. Bit Descriptions for P2_RX_PHY_ERR_CNT Bits Bit Name Description Reset Access [31:0] P2_RX_PHY_ERR_CNT Rx PHY Error Count. 0x0 R P2 Tx Frame Count Register Address: 0xD8, Reset: 0x00000000, Name: P2_TX_FRM_CNT Table 134. Bit Descriptions for P2_TX_FRM_CNT Bits Bit Name Description Reset Access [31:0] P2_TX_FRM_CNT Tx Frame Count. 0x0 R P2 Tx Broadcast Frame Count Register Address: 0xD9, Reset: 0x00000000, Name: P2_TX_BCAST_CNT Table 135. Bit Descriptions for P2_TX_BCAST_CNT Bits Bit Name Description Reset Access [31:0] P2_TX_BCAST_CNT Tx Broadcast Frame Count. 0x0 R |
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