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VNF9D5FTR Datasheet(PDF) 53 Page - STMicroelectronics |
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VNF9D5FTR Datasheet(HTML) 53 Page - STMicroelectronics |
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53 / 106 page ![]() An analogue multiplexer has been implemented to connect the different channels to the amplifier and the ADC block. Due to the current sense amplifier settling time when switching from the current sense mode of one channel, to the current sense mode of another channel, a priority management is implemented to control the time when the data conversion can be done in a safe/stable way and to arbitrate the concurrent ADC sampling requests (see next figures). Figure 22. Conversion window generation Conv_wdwx Outputx Channelx tON A minimum conversion time (tON_CS(min)) is defined to allow the signal stabilization at the input of the ADC converter and considering the sampling time. The user should manage the phase shift in a way that maximum two channels can be sampled in the same time window. Figure 23. Minimum ON time for digital current sense availability Conv_wdwx Outputx Channelx tON_CS(min) The sequence of channels to be converted is managed through an internal stack: VNF9D5F Diagnostic DS13946 - Rev 6 page 53/106 |
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