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VNF9D5FTR Datasheet(PDF) 3 Page - STMicroelectronics |
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VNF9D5FTR Datasheet(HTML) 3 Page - STMicroelectronics |
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3 / 106 page ![]() 1 Block diagram and pin description Figure 1. Block diagram Channel 0 1 Power Clamp Current Limitation Power Limitation Overtemperature Off state Openload Output shorted to Vcc Bulb / Led Mode Fail Safe functionality Diagnostic Control Blanking Time PWM Engine + Fallback clock (400kHz) ADC Current Sense Current Sense Multiplexer Undervoltage Vcc Clamp VREG VREG OTP / Limp Home DI0 DI1 VCC GND OUT0 OUT1 Slope Control Standby Mode Priority Manager 5-bit phase shift Current Sense Reverse Battery ADC BIST STDBY_NOT Capacitive Charging (CCM) i²t BIST Programmable i²t Protection 24-bit SPI CSN SDI SDO SCK Shadow Registers VDD Logic PWM_CLK i²t Current Sense Programmable i²t Protection i²t BIST Temperature Monitoring Current Sense Current Sense Figure 2. Connection diagram N.C. N.C. N.C. N.C. N.C. STDBY_NOT VREG GND 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 22 21 24 23 26 25 28 27 30 29 32 31 OUTPUT1 OUTPUT1 OUTPUT1 OUTPUT1 OUTPUT0 OUTPUT0 OUTPUT0 OUTPUT0 VNF9D5F Block diagram and pin description DS13946 - Rev 6 page 3/106 |
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