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TDA9855 Datasheet(PDF) 32 Page - NXP Semiconductors |
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TDA9855 Datasheet(HTML) 32 Page - NXP Semiconductors |
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32 / 52 page ![]() 1997 Nov 04 32 Philips Semiconductors Product specification I2C-bus controlled BTSC stereo/SAP decoder and audio processor TDA9855 Table 25 Timing current setting in register ALI3 Table 26 AVL attack time setting in register ALI3 IS RANGE DATA D2 TC2 D1 TC1 D0 TC0 +30% 1 0 0 +20% 1 0 1 +10% 1 1 0 Nominal 0 1 1 −10% 0 1 0 −20% 0 0 1 −30% 0 0 0 Ratt ( Ω) DATA D6 AT1 D5 AT2 420 0 0 730 1 0 1200 0 1 2100 1 1 Table 27 ADJ bit setting in register ALI3 FUNCTION DATA D7 Stereo decoder operation mode 0 Auto adjustment of channel separation 1 Fig.4 Automatic volume level control diagram. AVL measured at pin EOL/EOR. Y1 axis output level in AVL operation with typically 200 mV. Y2 axis VCAV DC voltage at pin CAV corresponds with typical gain steps in range of +6 to −15 dB. (1) VCAV (2) Vo max(rms) (3) Vo min(rms) handbook, full pagewidth MHA312 10 7 VCAV (V) 6 5 4 3 2 1 1 VI(rms) (V) 10−1 300 250 200 160 10−2 100 Vo(rms) (mV) (1) (2) (3) |
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