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LT6003 Datasheet(PDF) 18 Page - Analog Devices |
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LT6003 Datasheet(HTML) 18 Page - Analog Devices |
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18 / 30 page ![]() LTC2066/LTC2067/LTC2068 18 Rev. B For more information www.analog.com In the worst case, there may not be enough supply cur- rent available to take the system up to nominal voltages. In other cases, this transient power-up current will lead to added power loss in duty-cycled applications. A way to quantify the transient current loss is to integrate the supply current during power-up to examine the total charge loss. If there were no additional transient current, the integrated supply current would appear as a smooth, straight line with a slope equal to the DC supply current of the part. Any deviation from a straight line indicates additional transient current that is drawn from the supply. The LTC2066/LTC2067/LTC2068 have been designed to minimize this charge loss during power-up so that power can be conserved in duty-cycled applications. Figure 6 shows the integrated supply current (i.e. charge) of the LTC2066 during power-up. Likewise, Figure 7 shows the charge loss due to enabling and disabling the part via the SHDN pin. 1V/µs V– EDGE RATE V+ = 5V 500µs/DIV V– 5V/DIV VOUT 2V/DIV QV+ 10nC/DIV 2066 F06 Figure 6. LTC2066 Charge Loss During Power-Up 500µs/DIV VSHDN 5V/DIV VOUT 2V/DIV QV+ 10nC/DIV 2066 F07 Figure 7. LTC2066 Charge Loss Due to Enabling and Disabling via SHDN Pin APPLICATIONS INFORMATION Board leakage can be minimized by encircling the input connections with a guard ring operated at a potential very close to that of the inputs. The ring must be tied to a low impedance node. For inverting configurations, the guard ring should be tied to the potential of the positive input (+IN). For noninverting configurations, the guard ring should be tied to the potential of the negative input (–IN). In order for this technique to be effective, the guard ring must not be covered by solder mask. Ringing both sides of the printed circuit board may be required. See Figure 5 for an example of proper layout. Shutdown Mode The LTC2066 in the SC70 package, the LTC2067 in the DFN package, and the LTC2068 in the QFN package fea- ture a shutdown mode for low-power applications. In the OFF state, each amplifier draws less than 170nA of sup- ply current and the outputs present a high impedance to external circuitry. Shutdown operation is accomplished by tying SHDN below VL. If the shutdown feature is not required, it is recommended that SHDN be tied to V+. A current source pulls the SHDN pin high to keep the amplifier in the ON state when the pin is floated, however this may not be reliable at elevated temperatures due to board leakage (see SHDN Circuit Block Diagram, page 14). For operation in noisy environments, a capacitor between SHDN and V+ is recommended to prevent noise from changing the shutdown state. When there is a danger of SHDN being pulled beyond the supply rails, resistance in series with the SHDN pin is recommended to limit the resulting current. Start-Up Characteristics Micropower op amps are often not micropower during start-up, which can cause problems when used on low current supplies. Large transient currents can conduct during power-up until the internal bias nodes settle to their final values. A large amount of current can be drawn from the supplies during this transient, which can sustain for several milliseconds in the case of a micropower part. |
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