12F615 datasheet(77/168 Pages) MICROCHIP

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Preliminary

DS41302A-page 75

PIC12F609/615/12HV609/615

10.0

ENHANCED CAPTURE/

COMPARE/PWM (WITH AUTO-

SHUTDOWN AND DEAD BAND)

MODULE (PIC12F615/HV615

ONLY)

The Enhanced Capture/Compare/PWM module is a

peripheral which allows the user to time and control

different events. In Capture mode, the peripheral

allows the timing of the duration of an event.The

Compare mode allows the user to trigger an external

event when a predetermined amount of time has

expired. The PWM mode can generate a Pulse-Width

Modulated signal of varying frequency and duty cycle.

Table 10-1 shows the timer resources required by the

ECCP module.

TABLE 10-1:

ECCP MODE – TIMER

RESOURCES REQUIRED

ECCP Mode

Timer Resource

Capture

Timer1

Compare

Timer1

PWM

Timer2

CCP1CON: ENHANCED CCP1 CONTROL REGISTER

R/W-0

U-0

R/W-0

P1M

—

DC1B1

DC1B0

CCP1M3

CCP1M2

CCP1M1

CCP1M0

bit 7

bit 0

Legend:

R = Readable bit

W = Writable bit

U = Unimplemented bit, read as ‘0’

-n = Value at POR

‘1’ = Bit is set

‘0’ = Bit is cleared

x = Bit is unknown

bit 7

P1M: PWM Output Configuration bits

If CCP1M<3:2> = 00, 01, 10:

P1A assigned as Capture/Compare input; P1B assigned as port pins

If CCP1M<3:2> = 11:

Single output; P1A modulated; P1B assigned as port pins

Half-Bridge output; P1A, P1B modulated with dead-band control

bit 6

Unimplemented: Read as ‘0’

bit 5-4

DC1B<1:0>: PWM Duty Cycle Least Significant bits

Capture mode:

Unused.

Compare mode:

Unused.

PWM mode:

These bits are the two LSbs of the PWM duty cycle. The eight MSbs are found in CCPR1L.

bit 3-0

CCP1M<3:0>: ECCP Mode Select bits

0000

= Capture/Compare/PWM off (resets ECCP module)

0001

= Unused (reserved)

0010

= Compare mode, toggle output on match (CCP1IF bit is set)

0011

= Unused (reserved)

0100

= Capture mode, every falling edge

0101

= Capture mode, every rising edge

0110

= Capture mode, every 4th rising edge

0111

= Capture mode, every 16th rising edge

1000

= Compare mode, set output on match (CCP1IF bit is set)

1001

= Compare mode, clear output on match (CCP1IF bit is set)

1010

= Compare mode, generate software interrupt on match (CCP1IF bit is set, CCP1 pin is

unaffected)

1011

= Compare mode, trigger special event (CCP1IF bit is set; CCP1 resets TMR1 or TMR2 and starts

an A/D conversion, if the ADC module is enabled)

1100

= PWM mode; P1A active-high; P1B active-high

1101

= PWM mode; P1A active-high; P1B active-low

1110

= PWM mode; P1A active-low; P1B active-high

1111

= PWM mode; P1A active-low; P1B active-low

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