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12F615 Datasheet(PDF) 131 Page - Microchip Technology |
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12F615 Datasheet(HTML) 131 Page - Microchip Technology |
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131 / 168 page  © 2006 Microchip Technology Inc. Preliminary DS41302A-page 129 PIC12F609/615/12HV609/615 15.1 DC Characteristics: PIC12F609/615/12HV609/615-I (Industrial) PIC12F609/615/12HV609/615-E (Extended) DC CHARACTERISTICS Standard Operating Conditions (unless otherwise stated) Operating temperature -40°C ≤ TA ≤ +85°C for industrial -40°C ≤ TA ≤ +125°C for extended Param No. Sym Characteristic Min Typ† Max Units Conditions VDD Supply Voltage 2.0 — 5.5 V FOSC < = 8 MHz: INTOSC, EC D001 PIC12F609/615 2.0 — 5.5 V FOSC < = 4 MHz D001 PIC12HV609/615 2.0 — —(2) V FOSC < = 4 MHz D001B PIC12F609/F615 2.0 — 5.5 V FOSC < = 8 MHz: INTOSC, EC D001B PIC12HV609/615 2.0 — —(2) V FOSC < = 8 MHz: INTOSC, EC D001C PIC12F609/615 3.0 — 5.5 V FOSC < = 10 MHz D001C PIC12HV609/615 3.0 — —(2) V FOSC < = 10 MHz D001D PIC12F609/615 4.5 — 5.5 V FOSC < = 20 MHz D001D PIC12HV609/615 4.5 — —(2) V FOSC < = 20 MHz D002* VDR RAM Data Retention Voltage(1) 1.5 — — V Device in Sleep mode D003 VPOR VDD Start Voltage to ensure internal Power-on Reset signal —VSS —V See Section 11.3.1 “Power-on Reset (POR)” for details. D004* SVDD VDD Rise Rate to ensure internal Power-on Reset signal 0.05 — — V/ms See Section 11.3.1 “Power-on Reset (POR)” for details. * These parameters are characterized but not tested. † Data in “Typ” column is at 5.0V, 25°C unless otherwise stated. These parameters are for design guidance only and are not tested. Note 1: This is the limit to which VDD can be lowered in Sleep mode without losing RAM data. 2: User defined. Voltage across the shunt should not exceet 5V. |
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