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12F615 Datasheet(PDF) 142 Page - Microchip Technology |
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12F615 Datasheet(HTML) 142 Page - Microchip Technology |
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142 / 168 page ![]() PIC12F609/615/12HV609/615 DS41302A-page 140 Preliminary © 2006 Microchip Technology Inc. FIGURE 15-6: RESET, WATCHDOG TIMER, OSCILLATOR START-UP TIMER AND POWER-UP TIMER TIMING FIGURE 15-7: BROWN-OUT RESET TIMING AND CHARACTERISTICS VDD MCLR Internal POR PWRT Time-out OSC Start-Up Time Internal Reset(1) Watchdog Timer 33 32 30 31 34 I/O pins 34 Note 1: Asserted low. Reset(1) VBOR VDD (Device in Brown-out Reset) (Device not in Brown-out Reset) 33* 37 * 64 ms delay only if PWRTE bit in the Configuration Word register is programmed to ‘0’. Reset (due to BOR) VBOR + VHYST |
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