9 Layout

9.1 Layout Guidelines

The PCB layout is an important step to maintain the high performance of the TPSM83102 and TPSM83103

devices.

• Place input and output capacitors as close as possible to the IC. Traces need to be kept short. Route

wide and direct traces to the input and output capacitors results in low trace resistance and low parasitic

inductance.

9.2 Layout Example

VIN

VOUT

GND

GND

Figure 9-1. Layout Example

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TPSM83102, TPSM83103

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