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UBA1702A Datasheet(PDF) 8 Page - NXP Semiconductors |
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UBA1702A Datasheet(HTML) 8 Page - NXP Semiconductors |
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8 / 24 page ![]() 1997 Sep 29 8 Philips Semiconductors Product specification Line interrupter driver and ringer UBA1702; UBA1702A MUTE SWITCH AND ZENER PROTECTION (PINS MSI, MSA AND ZPA) The mute switch is, in fact, a switchable and electronic zener diode connected between the speech part output (pin SPO) and VEE. When the voltage applied at the mute switch input (pin MSI) is LOW, the switch is in over-voltage protection mode and the maximum SPO voltage is limited to 12 V. This level can be increased or decreased by connecting a resistor between pins ZPA (zener protection adjustment) and VEE or ZPA and SPO respectively. When the voltage applied at pin MSI is HIGH, the switch is in mute mode (DMO or NSA) resulting in a SPO voltage below 3 V. This level can be decreased by connecting a resistor between pins MSA (mute switch adjustment) and SPO. It should be noted that the mute switch stage is supplied from VDD thus a minimum voltage of approximately 2.1 V is required on VDD. REFERENCE The bias currents and voltages for the various speech blocks are generated by the reference block which is, in most cases, supplied from pin SPO. This block guarantees a high AC impedance at the SPO pin operating down to a low SPO voltage. Therefore, most speech part blocks operate independently from VDD. Ringer part The ringer part consists of five blocks, the ringer protection, the ringer threshold, the ringer frequency detection, the volume control and the piezo driver. The reference block which generates reference voltages and currents is also used in the ringer part (see Fig.1). RINGER PROTECTION (PINS RPI AND VRR) The ringer protection block converts the ringing current into a limited voltage between the ringer part input (pin RPI) and VEE. This voltage is used (via an internal diode) to generate the ringer supply voltage VRR which is mainly used for all ringer parts. The voltage at pin VRR must be filtered with a 22 µF capacitor connected between pins VRR and VSS. In electronic hook switch applications and also in speech mode (see Fig.8), pin RPI is always connected to the telephone line (through a series RC network and a diode bridge). In order not to disturb normal speech operation, a high AC impedance is present at pin RPI (providing the speech level is less than 1.5 V (RMS) i.e. 5.7 dBm). In the DMO or NSA mode (i.e. MSI is HIGH), the voltage across RPI and VEE is limited to 2.1 V. With this feature and in electronic hook switch applications, several additional ringers can be placed in parallel without tinkling during pulse dialling phase. RINGER THRESHOLD (PIN RTA) The piezo driver is internally enabled when the voltage at pin VRR exceeds a threshold level of 11 V. This threshold level can be increased or decreased by connecting a resistor between pins RTA (ringer threshold adjustment) and VSS or RTA and VRR respectively. Because of the built-in 6.5 V hysteresis, a voltage change at pin VRR (coming from current consumption increase when the piezo output is driven with a melody) will have no influence on this internal enabling signal. RINGER FREQUENCY DETECTION (PIN RFO) The ringer frequency detection block generates a square wave signal at the ringer frequency output (pin RFO) with twice the ringer signal frequency. This RFO signal can be used by the microcontroller for frequency discrimination. When the voltage at pin RPI drops below the voltage at pin VDD, RFO goes LOW. Pin RFO goes HIGH when the voltage at pin RPI exceeds the voltage at pin VRR. This VRR − VDD hysteresis allows the frequency detection circuit to ignore parasitic signals superimposed on the ringing signal. The voltage at pin EHI must be LOW to get a square wave at pin RFO. When the voltage at pin EHI is LOW, the voltage at pin RFO is always HIGH whatever the one at pin RPI is. VOLUME CONTROL (PINS RV0, RV1 AND RV2) The volume control input has three bits RV2, RV1 and RV0 to realize eight volume levels. The volume is controlled by regulating the supply voltage of the piezo output stage. The first six steps have a fixed value of 6 dB, the value of the last step (maximum volume) is dependent on the available voltage at pin VRR. Default setting during start-up is (RV2 = 0, RV1 = 0, RV0 = 0) which corresponds to minimum volume. In order not to damage the piezo transducer, the differential output ROA − ROB is internally limited to a value less than 32 V (p-p). |
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