MPX2003 datasheet(23/37 Pages) MPS

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MPX2003

– UP TO 140kHz ALL-IN-ONE FLYBACK CONTROLLER

MPX2003 Rev. 1.0

MonolithicPower.com

8/5/2022

MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.

VDD

VOUT

SGND

SDRV

SRD

MPX2003

Figure 9: VDD Supply from Both the Output and

SRD

By allowing VDD to be powered by VOUT and SRD,

the SR driver has an expedited start-up, which

limits the voltage spike caused by the body

diode’s reverse recovery. Otherwise, the current

supply for VDD comes from VOUT for optimized

efficiency.

Synchronous Rectification Turn On

After the primary-side MOSFET turns off, the

inductor current is transferred from the primary

side to the secondary side, which makes the SR

MOSFET’s drain voltage drop. When the voltage

on the SRD pin crosses the turn-on threshold

(VSR-ON), the secondary IC starts to set the SR

driver, and the SR MOSFET turns on after the

turn-on delay (tSR-OND).

When the SR MOSFET is on, there is a minimum

on time (tON-MIN) that prevents the MOSFET from

being

falsely

turned

off

due

parasitic

oscillation. During the minimum on time, the turn-

off action is not completely blanked, and the turn-

off threshold rises to VSR-OFFM. This ensures that

the SR MOSFET can always be turned off under

severe situations, even during the minimum on

time.

Synchronous Rectification Conduction

During the SR conduction period, the gate

voltage is regulated based on the forward

voltage drop across the MOSFET (VSRD). When

VSRD is below the internal reference voltage, the

gate driver fully turns on to reach the minimum

turn-on resistance. VSRD rises as the current

decreases. When VSRD exceeds the reference

voltage, the gate voltage is pulled down to

increase

the

turn-on

resistance,

and

the

regulation voltage quickly switches to -VFWD. This

means that the rising of VSRD is regulated to a

certain level, which effectively prevents a

premature turn-off while maximizing the SR

conduction period.

Synchronous Rectification Turn Off

As the inductor current reaches zero during

discontinuous conduction mode (DCM), VSRD

rises to zero. Once VSRD exceeds VSR-OFF, the

gate immediately pulls down to turn off the SR

MOSFET (see Figure 10).

-VFWD

VTH

VSRD

VSDRV

Turn-On

Delay

Turn-Off

Delay

Minimum

On Time

Driver begins to

pull down

Driver

turns off

Sync

Signal

VSR-ON

VSR-OFF

Figure 10: SR Operation during DCM

During continuous conduction mode (CCM), the

secondary IC generates a signal based on a

dead time to determine when the SR MOSFET

turns off and the primary MOSFET turns on. This

feature reduces the chances of shoot-through

(see Figure 11).

-VFWD

VTH

VSRD

VSDRV

Turn-On

Delay

Turn-Off

Delay

Minimum

On Time

Driver

turns off

Sync

Signal

Dead Time

VSR-ON

Figure 11: SR Operation during CCM

In burst mode, the SR gate block turns off to

reduce power loss. When the IC exits burst

mode, the SR gate block turns on after one

switching operation.

Output Voltage (VOUT) Regulation

The internal error amplifier regulates VOUT. VOUT

is fed back through the FB pin and external

dividing resistors, and is then compared to the

internal precise reference voltage (VREF). The

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