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ICS853111BY Datasheet(PDF) 12 Page - Integrated Device Technology

Part # ICS853111BY
Description  LOW SKEW, 1-TO-10, DIFFERENTIAL-TO- 2.5V, 3.3V LVPECL/ECL FANOUT BUFFER
PDF  19 Pages
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Manufacturer  IDT [Integrated Device Technology]
Direct Link  http://www.idt.com
Logo IDT - Integrated Device Technology

ICS853111BY Datasheet(HTML) 12 Page - Integrated Device Technology

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IDT™ / ICS™
1-TO-10, LVPECL/ECL FANOUT BUFFER
12
ICS853111BY REV. B SEPTEMBER 5, 2007
ICS853111B
LOW SKEW, 1-TO-10, DIFFERENTIAL-TO-2.5V, 3.3V LVPECL/ECL FANOUT BUFFER
SCHEMATIC EXAMPLE
This application note provides general design guide using
ICS853111B LVPECL buffer. Figure 6 shows a schematic example
of the ICS853111B LVPECL clock buffer. In this example, the
FIGURE 6. EXAMPLE ICS853111B LVPECL CLOCK OUTPUT BUFFER SCHEMATIC
input is driven by an LVPECL driver. CLK_SEL is set at logic high
to select PCLK0/nPCLK0 input.
C4
0.1uF
C6 (Option)
0.1u
Zo = 50
R7
50
Zo = 50
R2
50
VCC
R1
50
VCC
VCC=3.3V
C7 (Option)
0.1u
R3
50
(U1-16)
U1
ICS853111
1
2
3
4
5
6
7
8
17
18
19
20
21
22
23
24
VCC
CLK_SEL
PCLK0
nPCLK0
VBB
PCLK1
nPCLK1
VEE
nQ6
Q6
nQ5
Q5
nQ4
Q4
nQ3
Q3
R4
1K
Zo = 50
C2
0.1uF
(U1-9)
R8
50
Zo = 50 Ohm
C8 (Option)
0.1u
+
-
C5
0.1uF
R10
50
R11
50
3.3V LVPECL
+
-
VCC
(U1-32)
R13
50
C1
0.1uF
Zo = 50 Ohm
R9
50
C3
0.1uF
(U1-25)
VCC
Zo = 50
(U1-1)
EXPOSED PAD
Expose Metal Pad
(GROUND PAD)
GROUND PLANE
SOLDER
SIGNAL
TRACE
SIGNAL
TRACE
THERMAL VIA
SOLDER MASK
FIGURE 7. P.C. BOARD FOR EXPOSED PAD THERMAL RELEASE PATH EXAMPLE
THERMAL RELEASE PATH
The expose metal pad provides heat transfer from the device to
the P.C. board. The expose metal pad is ground pad connected
to ground plane through thermal via. The exposed pad on the
device to the exposed metal pad on the PCB is contacted through
solder as shown in Figure 7. For further information, please refer
to the Application Note on Surface Mount Assembly of Amkor’s
Thermally /Electrically Enhance Leadframe Base Package, Amkor
Technology.



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