UMA1021 datasheet(4/16 Pages) PHILIPS

4 / 16 page

1999 Jun 17

Philips Semiconductors

Product speciﬁcation

Low-voltage frequency synthesizer

for radio telephones

UMA1021M

PINNING

SYMBOL

DESCRIPTION

FAST

enable input for fast charge-pump

output CPF

CPF

fast charge-pump output

normal charge-pump output

VDD2

power supply 2

VSS3

ground 3

RFI

2 GHz main divider input

VSS2

ground 2

POL

digital input to select polarity of

power-on inputs (PON and sPON):

POL = 0 for active LOW and

POL = 1 for active HIGH

PON

power-on input

VSS1

ground 1

CLK

programming bus clock input

DATA

programming bus data input

programming bus enable input

VDD1

power supply 1

XTALB

complementary crystal frequency

input from TCXO; if not used should

be decoupled to ground

XTALA

crystal frequency input from TCXO;

if not used should be decoupled to

ground

GND(CP)

ground for charge-pump

VCC

supply for charge-pump

ISET

external resistor from this pin to

ground sets the charge-pump

currents

LOCK

out-of-lock detector output

Fig.2 Pin configuration.

handbook, halfpage

UMA1021M

MBG365

FAST

CPF

VDD2

VSS3

RFI

VSS2

POL

PON

VSS1

LOCK

ISET

VCC

GND(CP)

XTALA

XTALB

VDD1

DATA

CLK

FUNCTIONAL DESCRIPTION

Main divider

The main divider is clocked at pin RFI by the RF signal

which is AC-coupled from an external VCO. The divider

operates with signal levels from 50 to 225 mV (RMS), and

at frequencies from 300 MHz to 2.2 GHz. It consists of a

fully programmable bipolar prescaler followed by a CMOS

counter. Any divide ratios from 512 to 131071 inclusive

can be programmed.

Reference divider

The reference divider is clocked by the differential signal

between pins XTALA and XTALB. If only one of these

inputs is used, the other should be decoupled to ground.

The applied input signal(s) should be AC-coupled.

The circuit operates with levels from

50 up to 500 mV (RMS) and at frequencies from

3 to 35 MHz. Any divide ratios from 8 to 2047 inclusive

can be programmed.

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