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PIMXRT802VCJM4A Datasheet(PDF) 86 Page - NXP Semiconductors |
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PIMXRT802VCJM4A Datasheet(HTML) 86 Page - NXP Semiconductors |
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86 / 119 page  i.MX RT1060 Crossover Processors for Consumer Products, Rev. 4, 04/2024 86 NXP Semiconductors Boot mode configuration GPIO_EMC_03 semc.DATA[3] ALT 0 — GPIO_EMC_04 semc.DATA[4] ALT 0 — GPIO_EMC_05 semc.DATA[5] ALT 0 — GPIO_EMC_06 semc.DATA[6] ALT 0 — GPIO_EMC_07 semc.DATA[7] ALT 0 — GPIO_EMC_30 semc.DATA[8] ALT 0 — GPIO_EMC_31 semc.DATA[9] ALT 0 — GPIO_EMC_32 semc.DATA[10] ALT 0 — GPIO_EMC_33 semc.DATA[11] ALT 0 — GPIO_EMC_34 semc.DATA[12] ALT 0 — GPIO_EMC_35 semc.DATA[13] ALT 0 — GPIO_EMC_36 semc.DATA[14] ALT 0 — GPIO_EMC_37 semc.DATA[15] ALT 0 — GPIO_EMC_18 semc.ADDR[9] ALT 0 — GPIO_EMC_19 semc.ADDR[11] ALT 0 — GPIO_EMC_20 semc.ADDR[12] ALT 0 — GPIO_EMC_22 semc.BA1 ALT 0 — GPIO_EMC_41 semc.CSX[0] ALT 0 — Table 73. Boot trough NOR PAD Name IO Function ALT Comments GPIO_EMC_00 semc.DATA[0] ALT 0 — GPIO_EMC_01 semc.DATA[1] ALT 0 — GPIO_EMC_02 semc.DATA[2] ALT 0 — GPIO_EMC_03 semc.DATA[3] ALT 0 — GPIO_EMC_04 semc.DATA[4] ALT 0 — GPIO_EMC_05 semc.DATA[5] ALT 0 — GPIO_EMC_06 semc.DATA[6] ALT 0 — GPIO_EMC_07 semc.DATA[7] ALT 0 — GPIO_EMC_30 semc.DATA[8] ALT 0 — GPIO_EMC_31 semc.DATA[9] ALT 0 — GPIO_EMC_32 semc.DATA[10] ALT 0 — GPIO_EMC_33 semc.DATA[11] ALT 0 — Table 72. Boot trough NAND |
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