8 Detailed Description

8.1 Overview

This device contains four independent buffer with 3-state outputs and Schmitt-trigger inputs. Each gate performs

the Boolean function Y = A in positive logic.

8.2 Functional Block Diagram

One of Four Channels

xA

xY

xOE

8.3 Feature Description

8.3.1 Balanced CMOS 3-State Outputs

This device includes balanced CMOS 3-State outputs. The three states that these outputs can be in are driving

high, driving low, and high impedance. The term "balanced" indicates that the device can sink and source similar

currents. The drive capability of this device may create fast edges into light loads so routing and load conditions

should be considered to prevent ringing. Additionally, the outputs of this device are capable of driving larger

currents than the device can sustain without being damaged. It is important for the output power of the device

to be limited to avoid damage due to overcurrent. The electrical and thermal limits defined in the Absolute

Maximum Ratings must be followed at all times.

When placed into the high-impedance mode, the output will neither source nor sink current, with the exception of

minor leakage current as defined in the Electrical Characteristics table. In the high-impedance state, the output

voltage is not controlled by the device and is dependent on external factors. If no other drivers are connected

to the node, then this is known as a floating node and the voltage is unknown. A pull-up or pull-down resistor

can be connected to the output to provide a known voltage at the output while it is in the high-impedance state.

The value of the resistor will depend on multiple factors, including parasitic capacitance and power consumption

limitations. Typically, a 10 kΩ resistor can be used to meet these requirements.

Unused 3-state CMOS outputs should be left disconnected.

8.3.2 CMOS Schmitt-Trigger Inputs

This device includes inputs with the Schmitt-trigger architecture. These inputs are high impedance and are

typically modeled as a resistor in parallel with the input capacitance given in the Electrical Characteristics table

from the input to ground. The worst case resistance is calculated with the maximum input voltage, given in the

Absolute Maximum Ratings table, and the maximum input leakage current, given in the Electrical Characteristics

table, using Ohm's law (R = V ÷ I).

The Schmitt-trigger input architecture provides hysteresis as defined by ΔVT in the Electrical Characteristics

table, which makes this device extremely tolerant to slow or noisy inputs. While the inputs can be driven much

slower than standard CMOS inputs, it is still recommended to properly terminate unused inputs. Driving the

inputs with slow transitioning signals will increase dynamic current consumption of the device. For additional

information regarding Schmitt-trigger inputs, please see Understanding Schmitt Triggers.

8.3.3 Clamp Diode Structure

The inputs and outputs to this device have both positive and negative clamping diodes as depicted in Electrical

Placement of Clamping Diodes for Each Input and Output.

SN74HCS126

SCLS798B – JUNE 2020 – REVISED MAY 2023

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