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SI5366 Datasheet(PDF) 13 Page - Silicon Laboratories

Part # SI5366
Description  PRECISION CLOCK MULTIPLIER/JITTER ATTENUATOR
PDF  20 Pages
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Manufacturer  SILABS [Silicon Laboratories]
Direct Link  http://www.silabs.com
Logo SILABS - Silicon Laboratories

SI5366 Datasheet(HTML) 13 Page - Silicon Laboratories

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Si5366
Preliminary Rev. 0.2
13
87
88
FS_OUT–
FS_OUT+
OMULTI
Frame Sync Output.
Differential 8 kHz frame sync output or fifth high-speed clock
output with a frequency specified by FRQSEL and FRQTBL.
Output signal format is selected by SFOUT pins. Detailed oper-
ations and timing characteristics for this pin may be found in
the Any-Rate Precision Clock Family Reference Manual. Out-
put is differential for LVPECL, LVDS, and CML compatible
modes. For CMOS format, both output pins drive identical sin-
gle-ended clock outputs.
92
93
CKOUT2+
CKOUT2–
OMULTI
Clock Output 2.
Differential output clock with a frequency specified by FRQSEL
and FRQTBL. Output signal format is selected by SFOUT pins.
Output is differential for LVPECL, LVDS, and CML compatible
modes. For CMOS format, both output pins drive identical sin-
gle-ended clock outputs.
97
98
CKOUT4–
CKOUT4+
OMULTI
Clock Output 4.
Differential output clock with a frequency specified by FRQSEL
and FRQTBL settings. Output signal format is selected by
SFOUT pins. Output is differential for LVPECL, LVDS, and
CML compatible modes. For CMOS format, both output pins
drive identical single-ended clock outputs.
GND PAD
GND PAD
GND
Supply
Ground Pad.
The ground pad must provide a low thermal and electrical
impedance to a ground plane.
Table 3. Si5366 Pin Descriptions (Continued)
Pin #
Pin Name
I/O
Signal Level
Description



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