DDP3300A datasheet(39/53 Pages) MICRONAS

39 / 53 page

DDP 3300 A

PRELIMINARY DATA SHEET

MICRONAS INTERMETALL

4.6.5. Bus Inputs: Luma, Chroma, OSD, Front Sync (see Fig. 4–17)

Symbol

Parameter

Pin Name

Min.

Typ.

Max.

Unit

Test Conditions

VIL

Input Low Voltage

Y[0..7]

C[0 7]

–

0.8

VIH

Input High Voltage

C[0..7]

OSD[0:4]

FSY

1.5

–

tIS

Input Setup Time

FSY

–

tIH

Input Hold Time

–

Data Inputs

Main Clock

tIS

tIH

Y,C,RGB,Fsync

Fig. 4–17: Picture bus input timing

4.6.6. 20.25 MHz Main Clock Input, internally AC coupled (see Fig. 4–18)

Symbol

Parameter

Pin Name

Min.

Typ.

Max.

Unit

Test Conditions

VIT

Input Trigger Level

CLK20

2.1

2.5

2.9

fΦ

Φ Main Clock Frequency

20.25

MHz

VΦMIDC

Φ Main Clock Input DC Volt-

age

1.0

–

3.5

VΦMIAC

Φ M Clock Input AC Voltage

(p–p)

0.8

–

2.5

tΦMIH

tΦMIL

Φ M Clock Input High/Low

Ratio

0.9

1.0

1.1

tΦMIHL

Φ M Clock Input High to Low

Transition Time

–

0.15

fΦM

tΦMILH

Φ M Clock Input Low to High

Transition Time

–

0.15

fΦM

tΦMILH

0 V

VΦMIDC

VΦMIAC

tΦMIHL

tΦMIH

tΦMIL

DVSS

Fig. 4–18: Main clock input

DDP3300A Datasheet(PDF) 39 Page - Micronas

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