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AD7949 Datasheet(PDF) 14 Page - Analog Devices |
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AD7949 Datasheet(HTML) 14 Page - Analog Devices |
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14 / 20 page ![]() AD7689 Preliminary Technical Data Rev. PrC | Page 14 of 20 ground sense; CFG[12:10] = 10X2. In this configuration, the IN+ is identified by the channel in CFG[9:7]. Example: for IN0 = IN1+ and IN1 = IN1-, CFG[9:7] = 0002; for IN1 = IN1+ and IN0 = IN1-, CFG[9:7] = 0012 • Figure 14D, sows the inputs configured in any of the above combinations as the AD7689 can be configured dynamically. Sequencer The AD7689 includes a channel sequencer useful for scanning channels in a IN0 to INn fashion. Channels are scanned as single or pairs and with or without the temperature sensor, after the last channel is sequenced. The sequencer starts with IN0 and finishes with INn set in CFG[9:7]. For paired channels, the channels are paired depending on the last channel set in CFG[9:7]. Note that the channel pairs are always paired IN(even) = INx+ and IN(odd) = INx- regardless of CFG[7]. To enable the sequencer, CFG[2:1] are written to for initializing the sequencer. After CFG[13:0] is updated, DIN must be held low while reading data out (at least for bit 13) or the CFG will begin updating again. While operating in a sequence, the CFG can be changed by writing 012 to CFG[2:1]. However, if changing CFG[11] (paired or single channel) or CFG[9:7] (last channel in sequence), the sequence will reinitialize and convert IN0 (or IN1) after CFG is updated. Examples (only bits for input and sequencer are highlighted) Scan all IN[7:0] referenced to COM = GND sense with temperature sensor: 13 12 11 10 9 8 7 6 5 4 3 2 1 0 CFG INCC INn BW REF SEQ RB - 1 1 0 1 1 1 - - - - 1 0 - Scan 3 paired channels without temperature sensor and referenced to VREF/2: 13 12 11 10 9 8 7 6 5 4 3 2 1 0 CFG INCC INn BW REF SEQ RB - 0 0 X 1 0 X - - - - 1 1 - Scan 4 paired channels referenced to a GND sense with temperature sensor: 13 12 11 10 9 8 7 6 5 4 3 2 1 0 CFG INCC INn BW REF SEQ RB - 1 0 X 1 1 X - - - - 1 0 - Input Structure Figure 15 shows an equivalent circuit of the input structure of the AD7689. The two diodes, D1 and D2, provide ESD protection for the analog inputs, IN[7:0] and COM. Care must be taken to ensure that the analog input signal does not exceed the supply rails by more than 0.3 V because this causes the diodes to become forward biased and to start conducting current. These diodes can handle a forward-biased current of 130 mA maximum. For instance, these conditions could eventually occur when the input buffer’s supplies are different from VDD. In such a case, for example, an input buffer with a short circuit, the current limitation can be used to protect the part. CIN RIN D1 D2 CPIN IN+ OR IN- OR COM GND VDD Figure 15. Equivalent Analog Input Circuit The analog input structure allows the sampling of the true differential signal between INn+ and COM or INn+ and INn-. By using these differential inputs, signals common to both inputs are rejected. During the acquisition phase, the impedance of the analog inputs can be modeled as a parallel combination of the capacitor, CPIN, and the network formed by the series connection of RIN and CIN. CPIN is primarily the pin capacitance. RIN is typically 3.5kΩ and is a lumped component made up of serial resistors and the on resistance of the switches. CIN is typically 27 pF and is mainly the ADC sampling capacitor. Selectable Low Pass Filter During the conversion phase, where the switches are opened, the input impedance is limited to CPIN. While the AD7689 is acquiring, RIN and CIN make a 1-pole, low-pass filter that reduces undesirable aliasing effects and limits the noise from the driving circuitry. The low pass filter can be programmed for the full bandwidth or ¼ of the bandwidth with CFG[6] as shown in Table 9. DRIVER AMPLIFIER CHOICE Although the AD7689 is easy to drive, the driver amplifier needs to meet the following requirements: • The noise generated by the driver amplifier needs to be kept as low as possible to preserve the SNR and transition noise performance of the AD7689. Note that the AD7689 has a noise much lower than most of the other 16-bit ADCs and, therefore, can be driven by a noisier amplifier to meet a given system noise specification. The noise coming from the amplifier is filtered by the AD7689 analog input circuit low- pass filter made by RIN and CIN or by an external filter, if one is used. Because the typical noise of the AD7689 is 35 μV rms (with VREF = 5V), the SNR degradation due to the amplifier is ⎟ ⎟ ⎟ ⎟ ⎠ ⎞ ⎜ ⎜ ⎜ ⎜ ⎝ ⎛ + = − 2 3dB 2 ) ( f 2 π 35 35 20log N LOSS Ne SNR |
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