| Electronic Components Datasheet Search |
|
LMK6P Datasheet(PDF) 11 Page - Texas Instruments |
|
|
|||||||||||||||||||||||||||||
LMK6P Datasheet(HTML) 11 Page - Texas Instruments |
|
11 / 67 page ![]() over Recommended Operating Conditions, Typical Temp = 25°C, Frequency output = 156.25 MHz, VDD = 3.3 V, LVCMOS Output Capacitor load = 2.2 pF (unless otherwise specified)(7) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT PSRR Spur induced by 50 mV power supply ripple at 50MHz output, VDD = 2.5V/3.3 V, No power supply decoupling capacitor Sine wave at 50 kHz –72 dBc Sine wave at 100 kHz –71 dBc Sine wave at 500 kHz –70 dBc Sine wave at 1 MHz –69 dBc PSRR Spur induced by 50 mV power supply ripple at 50MHz output, VDD = 1.8V, No power supply decoupling capacitor Sine wave at 50 kHz –50 dBc Sine wave at 100 kHz –50 dBc Sine wave at 500 kHz –52 dBc Sine wave at 1 MHz –55 dBc PSRR Jitter sensitivity to Power supply ripple; 100 kHz sine wave ripple, 3.3 V Supply(2) 10 fs/mV Power-On Characteristics tSTART_UP Start-up Time Time elapsed from 0.95 x VDD until output is enabled and output is within specification; Tested with a VDD supply ramp time of around 200 μs 5 ms tOE-EN Output Enable Time Time elapsed from OE = VIH until output is enabled and output is within specification, Fout > 10 MHz 25 µs tOE-DIS Output Disable Time Time elapsed from OE = VIL until output is disabled, Fout > 10 MHz 1 µs LVPECL - Clock Output Jitter RJ RMS Jitter (Integration BW: 12 kHz to 20 MHz) Fout = 156.25 MHz 100 125 fs PN1k Phase Noise at 1 kHz Offset Fout = 156.25 MHz. –95 dBc/Hz PN10k Phase Noise at 10 kHz Offset –127 dBc/Hz PN100k Phase Noise at 100 kHz Offset –146 dBc/Hz PN1M Phase Noise at 1 MHz Offset –156 dBc/Hz PN10M Phase Noise at 10 MHz Offset –158 dBc/Hz RJ RMS Jitter (Integration BW: 12 kHz to 20 MHz) Fout = 312.5 MHz 100 125 fs PN1k Phase Noise at 1 kHz Offset Fout = 312.5 MHz. –89 dBc/Hz PN10k Phase Noise at 10 kHz Offset –121 dBc/Hz PN100k Phase Noise at 100 kHz Offset –140 dBc/Hz PN1M Phase Noise at 1 MHz Offset –150 dBc/Hz PN10M Phase Noise at 10 MHz Offset –154 dBc/Hz RJ RMS Jitter (Integration BW: 12 kHz to 20 MHz) Fout = 100 MHz 125 170 fs Fout = 125 MHz 100 125 fs Fout = 155.52 MHz 100 125 fs Fout = 161.1328125 MHz 110 150 fs Fout = 200 MHz 120 150 fs Fout = 400 MHz 100 135 fs RPeriodJITT ,RMS RMS Period Jitter Fout ≥ 25 MHz 1.7 ps RJITT,PK- PK Peak-peak Period Jitter Fout ≥ 25 MHz 13 ps LVDS - Clock Output Jitter RJ RMS Jitter (Integration BW: 12 kHz to 20 MHz) Fout = 156.25 MHz 100 125 fs www.ti.com LMK6C, LMK6D, LMK6H, LMK6P SNAS826E – APRIL 2022 – REVISED APRIL 2024 Copyright © 2024 Texas Instruments Incorporated Submit Document Feedback 11 Product Folder Links: LMK6C LMK6D LMK6H LMK6P |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |