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MD1213 Datasheet(PDF) 3 Page - Supertex, Inc

Part # MD1213
Description  High Speed Dual MOSFET Driver
PDF  7 Pages
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Manufacturer  SUTEX [Supertex, Inc]
Direct Link  http://www.supertex.com
Logo SUTEX - Supertex, Inc

MD1213 Datasheet(HTML) 3 Page - Supertex, Inc

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3
MD1213
Logic Truth Table
Outputs (V
H = VDD1 = VDD2 = 12V, VL = VSS1 = VSS2 = 0V, VOE = 3.3V, TJ = 25°C)
Sym
Parameter
Min
Typ
Max
Units
Conditions
V
IH
OE Input logic voltage high
1.2
-
5.0
V
For logic input OE
V
IL
OE Input logic voltage low
0
-
0.3
V
R
IN
Input logic impedance to GND
12
20
30
KΩ
C
IN
Logic input capacitance
-
5.0
10
pF
All inputs
θ
JA
Thermal resistance to air
-
47
-
°C/W
1oz. 4-layer 3x4” PCB with thermal
pad and thermal via array
θ
JC
Thermal resistance to case
-
7.0
-
°C/W
---
R
SINK
Output sink resistance
-
-
12.5
Ω
I
SINK = 50mA
R
SOURCE
Output source resistance
-
-
12.5
Ω
I
SOURCE = 50mA
I
SINK
Peak output sink current
-
2.0
-
A
---
I
SOURCE
Peak output source current
-
2.0
-
A
---
AC Electrical Characteristics (V
H = VDD1 = VDD2 = 12V, VL = VSS1 = VSS2 = 0V, VOE = 3.3V, TJ = 25°C)
Sym
Parameter
Min
Typ
Max
Units
Conditions
t
irf
Inputs or OE rise & fall time
-
-
10
ns
Logic input edge speed requirement
t
PLH
Propagation delay when out-
put is from low to high
-
7.0
-
ns
C
LOAD = 1000pF,
see timing diagram
Input signal rise/fall time of 2ns
t
PHL
Propagation delay when out-
put is from high to low
-
7.0
-
ns
t
POE
Propagation delay OE to
outputs
-
9.0
-
ns
t
r
Output rise time
-
6.0
-
ns
t
f
Output fall time
-
6.0
-
ns
l t
r - tf l
Rise and fall time matching
-
1.0
-
ns
For each channel
l t
PLH-tPHL l
Propagation low to high and
high to low matching
-
1.0
-
ns
Δt
dm
Propagation delay match
-
±2.0
-
ns
Device to device delay match
Logic Inputs
Output
OE
IN
A
IN
B
OUT
A
OUT
B
HL
L
V
H
V
H
HL
H
V
H
V
L
HH
L
V
L
V
H
HHH
V
L
V
L
LX
X
V
H
V
L



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