SC4901ITSTRT datasheet(9/20 Pages) SEMTECH

9 / 20 page

 2005 Semtech Corp.

www.semtech.com

SC4901

POWER MANAGEMENT

Application Information (Cont.)

The RCT pin has a timing capacitor CT connected to AGND

and a charging resistor RT connected to the source, which

is typically derived from the transformer voltage. The RCT

pin is clamped to 3V peak internally and the ramp operates

between 0V and 3V. The high side forward pulse is

terminated whenever the RCT ramp hits the 3V peak.

Ensure that the ramp reaches this peak only after the

negative transition of the transformer voltage, even under

the worst case conditions of high line and maximum

applicable duty ratio. Otherwise the available pulse width

for post regulation will be limited. On the other hand, the

timing capacitor should get charged fully to 3V prior to

positive transition of the transformer voltage. This will

ensure that the dead time between the rectifying and

forward gate drives is consistently maintained. Ideally the

ramp should be charged to its peak of 3V just after the

falling edge of the transformer secondary voltage so that

the voltage error amplifier output utilises the full range of

0 to 3V. This is shown in the idealised waveforms below.

Fig 2. Idealised ZCD and RCT waveforms

The timings for the idealised waveforms above are easier

to implement if the transformer has some form of constant

volt-second operation or control; the secondary voltage can

be directly used to charge the timing capacitor CT. The

maximum input current into the RCT pin under clamped

conditions should be limited to 2 mA.

Turn On Sequence

Prior to transformer voltage going positive, the ramp

capacitor is at its maximum of 3.0V. On the rising edge of

transformer secondary, 0.75V at the ZCD pin is detected

first and OUTB gate drive goes low which turns off the low

side rectifying FET QR (Fig. 1). Simultaneously a current

sink of 10 mA is activated to discharge the timing capacitor

CT to the lower threshold of 1V. This discharge time

provides the delay between turn off of rectifying FET and

turn on of the forward MOSFETs and is given by

= CT

DLon

where CT is the ramp capacitor value in pF and DLon is

the dead time in nS. The actual dead time is extended by

the propagation delays internal to the controller, which

should be taken into account while choosing CT. The

propagation delays are typically in the range of a few tens

of nanoseconds.

When the RCT pin goes down to 1V, OUTA is enabled to

drive the high side pair of FETs. Meanwhile, on the rising

edge of ZCD pin, a higher threshold of 3.5V is detected.

Once both these conditions have been met, OUTA goes

high, XFRA and the forward FETs QS and QF are turned on.

Setting the RCT Ramp

The CT capacitor is typically charged from the transformer

secondary voltage through RT. The current through RT is

given by (V

SEC - VFWD - VCT) / RT

where

SEC

= Peak of the transformer secondary voltage

FWD

= Forward drop of the signal diode (D1 in Fig 1)

= Instantaneous capacitor voltage

As a first approximation the average current can be

assumed to be (V

SEC - 2V ) / RT.

ZCD INPUT

XFR SEC

VOLTAGE

RCT RAMP

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