The value of the resistor will depend on multiple factors, including parasitic capacitance and power consumption

limitations. Typically, a 10kΩ resistor can be used to meet these requirements.

Unused 3-state CMOS outputs should be left disconnected.

7.3.1.2 Balanced CMOS Push-Pull Outputs

This device includes balanced CMOS push-pull outputs. The term balanced indicates that the device can sink

and source similar currents. The drive capability of this device may create fast edges into light loads, so routing

and load conditions should be considered to prevent ringing. Additionally, the outputs of this device are capable

of driving larger currents than the device can sustain without being damaged. It is important to limit the output

power of the device to avoid damage due to overcurrent. The electrical and thermal limits defined in the Absolute

Maximum Ratings must be followed at all times.

Unused push-pull CMOS outputs must be left disconnected.

7.3.1.3 Open-Drain CMOS Outputs

This device includes open-drain CMOS outputs. Open-drain outputs can only drive the output low. When in

the high logical state, open-drain outputs will be in a high-impedance state. The drive capability of this device

may create fast edges into light loads, so routing and load conditions should be considered to prevent ringing.

Additionally, the outputs of this device are capable of driving larger currents than the device can sustain without

being damaged. It is important for the output power of the device to be limited to avoid damage due to

overcurrent. The electrical and thermal limits defined in the Absolute Maximum Ratings must be followed at all

times.

When placed into the high-impedance state, the output will neither source nor sink current, with the exception of

minor leakage current as defined in the Electrical Characteristics table. In the high-impedance state, the output

voltage is not controlled by the device and is dependent on external factors. If no other drivers are connected to

the node, then this is known as a floating node and the voltage is unknown. A pull-up resistor can be connected

to the output to provide a known voltage at the output while it is in the high-impedance state. The value of

the resistor will depend on multiple factors, including parasitic capacitance and power consumption limitations.

Typically, a 10kΩ resistor can be used to meet these requirements.

Unused open-drain CMOS outputs should be left disconnected.

7.3.1.4 CMOS Schmitt-Trigger Inputs

This device includes inputs with the Schmitt-trigger architecture. These inputs are high impedance and are

typically modeled as a resistor in parallel with the input capacitance given in the Electrical Characteristics table

from the input to ground. The worst case resistance is calculated with the maximum input voltage, given in the

Absolute Maximum Ratings table, and the maximum input leakage current, given in the Electrical Characteristics

table, using Ohm's law (R = V ÷ I).

The Schmitt-trigger input architecture provides hysteresis as defined by ΔVT in the Electrical Characteristics

table, which makes this device extremely tolerant to slow or noisy inputs. While the inputs can be driven much

slower than standard CMOS inputs, it is still recommended to properly terminate unused inputs. Driving the

inputs with slow transitioning signals will increase dynamic current consumption of the device. For additional

information regarding Schmitt-trigger inputs, please see Understanding Schmitt Triggers .

7.3.1.5 TTL-Compatible CMOS Inputs

This device includes TTL-compatible CMOS inputs. These inputs are specifically designed to interface with TTL

logic devices by having a reduced input voltage threshold.

TTL-compatible CMOS inputs are high impedance and are typically modeled as a resistor in parallel with

the input capacitance given in the Electrical Characteristics. The worst case resistance is calculated with the

maximum input voltage, given in the Absolute Maximum Ratings, and the maximum input leakage current, given

in the Electrical Characteristics, using Ohm's law (R = V ÷ I).

TTL-compatible CMOS inputs require that input signals transition between valid logic states quickly, as defined

by the input transition time or rate in the Recommended Operating Conditions table. Failing to meet this

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SN74HCS240

SCLS871B – JULY 2021 – REVISED AUGUST 2024

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