HT49CV3 datasheet(10/44 Pages) HOLTEK

10 / 44 page

HT49RV3/HT49CV3

Rev. 1.30

March 20, 2007

Bit No.

Label

Function

EMI

Controls the master or global interrupt (1=enable; 0=disable)

EEI0

Controls the external interrupt 0 (1=enable; 0=disable)

EEI1

Controls the external interrupt 1 (1=enable; 0=disable)

ET0I

Controls the Timer/Event Counter 0 interrupt (1=enable; 0=disable)

EIF0

External interrupt 0 request flag (1=active; 0=inactive)

EIF1

External interrupt 1 request flag (1=active; 0=inactive)

T0F

Internal Timer/Event Counter 0 request flag (1=active; 0=inactive)

Unused bit, read as

²0²

INTC0 (0BH) Register

Bit No.

Label

Function

ET1I

Controls the Timer/Event Counter 1 interrupt (1=enable; 0=disable)

ESII

Controls the serial interface interrupt (1=enabled; 0:disabled)

EMFI

Controls the real multi-function interrupt (1=enable; 0:disable)

3, 7

Unused bit, read as

²0²

T1F

Internal Timer/Event Counter 1 request flag (1=active; 0=inactive)

SIF

Serial interface data transferred or data received interrupt request flag (1=active; 0=inactive)

MFF

Multi-function interrupt request flag (1=active; 0=inactive)

INTC1 (1EH) Register

Bit No.

Label

Function

Unused bit, read as

²0²

ERMT0

Controls the remote control timer rising edge interrupt (1=enable; 0=disable)

ERMT1

Controls the remote control timer falling edge interrupt (1=enable; 0=disable)

ERMTV Controls the remote control timer overflow interrupt (1=enable; 0=disable)

RME

Controls the remote control timer (1=enable; 0=disable)

1=enable & start counting; 0= disable & clear counter to 0

RMCS

Selects the remote control timer clock source fX (1=fSYS; 0=fSYS/4)

RMS0

RMS1

Selects the remote control timer clock

00=fX/2

01= fX/2

10= fX/2

11= fX/2

RMTC (21H) Register

Once an interrupt subroutine is serviced, all other inter-

rupts are blocked (by clearing the EMI bit). This scheme

may prevent any further interrupt nesting. Other inter-

rupt requests may take place during this interval, but

only the interrupt request flag will be recorded. If another

interrupt requires servicing while the program is in the

interrupt service routine, the programmer should set the

EMI bit and the corresponding bit of the INTC0 or INTC1

to allow interrupt nesting. Once the stack is full, the inter-

rupt request will not be acknowledged, even if the related

interrupt is enabled, until the SP is decremented. If imme-

diate service is desired, the stack should be prevented

from becoming full.

All these interrupts can support a wake-up function. As

an interrupt is serviced, a control transfer occurs by

pushing the contents of the Program Counter onto the

stack followed by a branch to a subroutine at the speci-

fied location in the ROM. Only the contents of the Pro-

gram Counter is pushed onto the stack. If the contents of

the register or of the status register (STATUS) is altered

by the interrupt service program which corrupts the de-

sired control sequence, the contents should be saved in

advance.

HT49CV3 Datasheet(PDF) 10 Page - Holtek Semiconductor Inc

HT49CV3 Datasheet(HTML) 10 Page - Holtek Semiconductor Inc

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44

Datasheet Download

Link URL