SC4809B datasheet(12/16 Pages) SEMTECH

12 / 16 page

 2005 Semtech Corp.

www.semtech.com

SC4809A/B/C

POWER MANAGEMENT

knowing what the transfer characteristic of the PWM and

switching circuit looks like. Constructing a Bode plot of

the known poles and zeros in the power stage does this.

Bode plots give a visual interpretation of the gain versus

frequency and phase versus frequency characteristics

of a system. In the gain plot, the gain shown at each

frequency represents the amount by which the feedback

loop will reduce a disturbance at that frequency.

Besides the RHP zero, the output capacitor and the load

contribute a pole and the output capacitor alone will

contribute a zero based upon its ESR.

OUT

pole

•

OUT

zero

ESR

•

The control to output gain is calculated by:













•

−

•

)

(

)

(

log

GAIN

OUT

Once the frequency response of the uncompensated

system is determined, the next step is to determine what

compensation is needed around the error amplifier for

optimum performance. As stated earlier, optimum

performance requires a high gain at low frequencies for

good DC regulation and high bandwidth for good transient

response. The crossover frequency, f

c, is the frequency

at which the gain magnitude equals 0dB. High bandwidth

is achieved by having the highest possible f

c. Because of

the RHP zero, the highest possible crossover frequency

is limited to f

RHPZERO/π. The phase margin, or the amount

the phase lag measures at f

c less 180°, should be at

least 45° for good transient response with little

overshoot. The magnitude of the gain at the frequency

where the phase plot measures - 180° is referred to as

the gain margin. If the slope of the gain plot is -2, or

-40dB/decade, at low frequencies, it much transition to

a -20dB/decade slope, also known as a -1 slope, one

decade before crossing the 0dB point. If the slope

remains at the -2 slope the resultant gain margin would

be too small causing sever underdamped oscillations at

fc.

Application Information (Cont.)

The scheme shown below will handle most compensation

requirements. There is a pole at the origin which

contributes a -1 slope in the gain plot, a low frequency

zero, f

EAZERO flattens out the slope so the mid-range gain

is equal to Rf/Ri. A high frequency pole, f

EAPOLE helps

suppress any high frequency noise from propagating

through the system. Rd forms a voltage divider with Ri

and provides a DC offset.

EAPOLE

EAZERO

•

By combining the Bode plots of the PWM and power stage

with the error amplifier compensation, a plot of the entire

system is realized.

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