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AK4385VT Datasheet(PDF) 9 Page - Asahi Kasei Microsystems |
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AK4385VT Datasheet(HTML) 9 Page - Asahi Kasei Microsystems |
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9 / 23 page ![]() ASAHI KASEI [AK4385] MS0246-E-01 2006/01 - 9 - OPERATION OVERVIEW System Clock The external clocks, which are required to operate the AK4385, are MCLK, LRCK and BICK. The master clock (MCLK) should be synchronized with LRCK but the phase is not critical. The MCLK is used to operate the digital interpolation filter and the delta-sigma modulator. There are two methods to set MCLK frequency. In Manual Setting Mode (ACKS = “0”: Register 00H), the sampling speed is set by DFS0/1(Table 1). The frequency of MCLK at each sampling speed is set automatically. (Table 2~4).After exiting reset (PDN = “ ↑”), the AK4385 is in Auto Setting Mode. In Auto Setting Mode (ACKS = “1”: Default), as MCLK frequency is detected automatically (Table 5), and the internal master clock becomes the appropriate frequency (Table 6), it is not necessary to set DFS0/1. All external clocks (MCLK,BICK and LRCK) should always be present whenever the AK4385 is in the normal operation mode (PDN= ”H”). If these clocks are not provided, the AK4385 may draw excess current and may fall into unpredictable operation. This is because the device utilizes dynamic refreshed logic internally. The AK4385 should be reset by PDN= “L” after threse clocks are provided. If the external clocks are not present, the AK4385 should be in the power-down mode (PDN= “L”). After exiting reset at power-up etc., the AK4385 is in the power-down mode until MCLK and LRCK are input. DFS1 DFS0 Sampling Rate (fs) 0 0 Normal Speed Mode 8kHz~48kHz Default 0 1 Double Speed Mode 60kHz~96kHz 1 0 Quad Speed Mode 120kHz~192kHz Table 1. Sampling Speed (Manual Setting Mode) LRCK MCLK BICK fs 256fs 384fs 512fs 768fs 1152fs 64fs 32.0kHz 8.1920MHz 12.2880MHz 16.3840MHz 24.5760MHz 36.8640MHz 2.0480MHz 44.1kHz 11.2896MHz 16.9344MHz 22.5792MHz 33.8688MHz N/A 2.8224MHz 48.0kHz 12.2880MHz 18.4320MHz 24.5760MHz 36.8640MHz N/A 3.0720MHz Table 2. System Clock Example (Normal Speed Mode @Manual Setting Mode) LRCK MCLK BICK fs 128fs 192fs 256fs 384fs 64fs 88.2kHz 11.2896MHz 16.9344MHz 22.5792MHz 33.8688MHz 5.6448MHz 96.0kHz 12.2880MHz 18.4320MHz 24.5760MHz 36.8640MHz 6.1440MHz Table 3. System Clock Example (Double Speed Mode @Manual Setting Mode) LRCK MCLK BICK fs 128fs 192fs 64fs 176.4kHz 22.5792MHz 33.8688MHz 11.2896MHz 192.0kHz 24.5760MHz 36.8640MHz 12.2880MHz Table 4. System Clock Example (Quad Speed Mode @Manual Setting Mode) |
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