ASAHI KASEI

[AK4385]

MS0246-E-01

2006/01

- 14 -

System Reset

The AK4385 should be reset once by bringing PDN= ”L” upon power-up. The AK4385 is powered up and the internal

timing starts clocking by LRCK “

↑” after exiting reset and power down state by MCLK. The AK4385 is in the

power-down mode until MCLK and LRCK are input.

Power-down

The AK4385 is placed in the power-down mode by bringing PDN pin “L” and the anlog outputs are floating (Hi-Z).

Figure 6 shows an example of the system timing at the power-down and power-up.

Normal Operation

Internal

State

PDN

Power-down

Normal Operation

GD

GD

“0” data

D/A Out

(Analog)

D/A In

(Digital)

Clock In

MCLK, LRCK, BICK

(1)

(3)

(6)

DZFL/DZFR

External

MUTE

(5)

(3)

(1)

Mute ON

(2)

(4)

Don’t care

Notes:

(1) The analog output corresponding to digital input has the group delay (GD).

(2) Analog outputs are floating (Hi -Z) at the power-down mode.

(3) Click noise occurs at the edge of PDN signal. This noise is output even if “0” data is input.

(4) The external clocks (MCLK, BICK and LRCK) can be stopped in the power-down mode (PDN = “L”).

(5) Please mute the analog output externally if the click noise (3) influences system application.

The timing example is shown in this figure.

(6) DZF pins are “L” in the power-down mode (PDN = “L”).

Figure 6. Power-down/up Sequence Example