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TMS320VC5510 Datasheet(PDF) 21 Page - Texas Instruments |
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TMS320VC5510 Datasheet(HTML) 21 Page - Texas Instruments |
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21 / 90 page  Introduction 21 June 2000 − Revised September 2007 SPRS076O Table 2−2. Signal Descriptions (Continued) SIGNAL NAME DESCRIPTION OTHER‡ TYPE† SUPPLY VOLTAGE PINS CVDD S Dedicated power supply for the internal logic (CPU and peripherals) DVDD S Dedicated power supply for the I/O pins VSS S Ground MISCELLANEOUS PINS NC No connection − do not connect † I = Input, O = Output, S = Supply, Z = High impedance ‡ Other Pin Characteristics: A − Internal pullup (always enabled) E − Pin is high impedance in HOLD mode (due to HOLD pin). B − Internal pulldown (always enabled) F − Pin is high impedance in OFF mode (due to EMU1/OFF pin). C − Hysteresis input G − Pin can be configured as a general-purpose input. D − Pin has bus holder H − PIn can be configured as a general-purpose output. J − Internal pullup enabled by the HPE bit in the system register (SYSR) K − Internal pulldown enabled by the HPE bit in the system register (SYSR) |
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