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STD5N20L Datasheet(PDF) 3 Page - STMicroelectronics |
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STD5N20L Datasheet(HTML) 3 Page - STMicroelectronics |
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3 / 10 page ![]() 3/10 STD5N20L Table 6: Dynamic Table 7: Source Drain Diode (1) Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %. (2) Starting Tj =25 °C, Id = 5 A, VDD = 50 V (*) Pulse width limited by safe operating area Symbol Parameter Test Conditions Min. Typ. Max. Unit gfs (2) Forward Transconductance VDS = 15 V, ID = 5 A 6.5 S Ciss Coss Crss Input Capacitance Output Capacitance Reverse Transfer Capacitance VDS = 25V, f = 1 MHz, VGS = 0 242 44 6 pF pF pF td(on) tr td(off) tf Turn-on Delay Time Rise Time Turn-off Delay Time Fall Time VDD = 100 V, ID = 2.5 A RG = 4.7Ω, VGS = 5V (Resistive Load see Figure 14) 11.5 21.5 14 15.5 ns ns ns ns Qg Qgs Qgd Total Gate Charge Gate-Source Charge Gate-Drain Charge VDD = 160 V, ID = 5 A, VGS = 5V 5 1.5 3 6nC nC nC Symbol Parameter Test Conditions Min. Typ. Max. Unit ISD Source-drain Current 5 A ISDM (*) Source-drain Current (pulsed) 20 A VSD (1) Forward On Voltage ISD = 5 A, VGS = 0 1.5 V trr Qrr IRRM Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Current ISD = 5 A, di/dt = 100 A/µs, VDD = 100 V, Tj = 25°C (see test circuit, see Figure 15) 93 237 5.1 ns nC A trr Qrr IRRM Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Current ISD = 5 A, di/dt = 100 A/µs, VDD = 100 V, Tj = 150°C (see test circuit, see Figure 15) 97 286 5.9 ns nC A |
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