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IR3086AM Datasheet(PDF) 6 Page - International Rectifier |
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IR3086AM Datasheet(HTML) 6 Page - International Rectifier |
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6 / 33 page ![]() IR3086A SYSTEM THEORY OF OPERATION XPhase TM Architecture The XPhase TM architecture is designed for multiphase interleaved buck converters which are used in applications requiring small size, design flexibility, low voltage, high current and fast transient response. The architecture can control converters of any phase number where flexibility facilitates the design trade-off of multiphase converters. The scalable architecture can be applied to other applications which require high current or multiple output voltages. As shown in Figure 1, the XPhase TM architecture consists of a Control IC and a scalable array of phase converters each using a single Phase IC. The Control IC communicates with the Phase ICs through a 5-wire analog bus, i.e. bias voltage, phase timing, average current, error amplifier output, and VID voltage. The Control IC incorporates all the system functions, i.e. VID, PWM ramp oscillator, error amplifier, bias voltage, and fault protections etc. The Phase IC implements the functions required by the converter of each phase, i.e. the gate drivers, PWM comparator and latch, over-voltage protection, and current sensing and sharing. There is no unused or redundant silicon with the XPhase TM architecture compared to others such as a 4 phase controller that can be configured for 2, 3, or 4 phase operation. PCB Layout is easier since the 5 wire bus eliminates the need for point-to-point wiring between the Control IC and each Phase. The critical gate drive and current sense connections are short and local to the Phase ICs. This improves the PCB layout by lowering the parasitic inductance of the gate drive circuits and reducing the noise of the current sense signal. RCS CIN 0.1uF 0.1uF RCS CCS CCS VOUT+ 12V VOUT- VOUT SENSE- VID2 VID0 VID3 VOUT SENSE+ VID4 ENABLE VR HOT POWER GOOD PHASE FAULT VID5 VID1 >> PWM CONTROL >> PHASE TIMING >> BIAS VOLTAGE IR3081A CONTROL IC COUT CONTROL BUS IR3086A PHASE IC INPUT/OUTPUT ADDITIONAL PHASES << CURRENT SENSE PHASE HOT PHASE FAULT PHASE FAULT >> VID VOLTAGE CURRENT SHARE CURRENT SHARE PHASE HOT IR3086A PHASE IC Figure 1. System Block Diagram Page 6 of 33 1/31/05 |
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