RT9022 datasheet(7/11 Pages) RICHTEK

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RT9022

Preliminary

DS9022-00

September 2007

www.richtek.com

Application Information

Enable

The RT9022 goes into sleep mode when the Enable pin is

in a logic low condition. During this condition, the pass

transistor, error amplifier, and bandgap are turned off,

reducing the supply current to 1

μA. The Enable input is a

CMOS logic and cannot be left floating.

Output capacitor

The RT9022 is specifically designed to use ceramic output

capacitors as low as 2.2

μF. Ceramic capacitors below 10μF

offer significant cost and space saving, along with high

frequency noise filtering. The RT9022 doesn't rely on a

zero, which is generated by output capacitor ESR. So,

the output capacitor ESR is not sensitive and very low

ESR is allowed.

Input capacitor

A 1

μF input capacitor or greater located as close as

possible to the IC is recommended. Larger input capacitor

value with lower ESR provides better power supply noise

rejection and line transient response. Larger load current

requires larger capacitor value.

PSRR

The power supply rejection ratio (PSRR) is defined as the

gain from the input to output divided by the gain from the

supply to the output. The PSRR is found to be

Gain Error

PSRR = 20 log

Supply

⎛⎞

⎜⎟

⎝⎠

Note that when heavy load is measured,

Δsupply will cause

Δtemperature. And Δtemperature will cause Δoutput

voltage. So the temperature effect must be taken into

consideration.

Current Limit

The RT9022 contains an independent current limiter, which

monitors and controls the pass transistor's gate voltage

to limit the output current to 80mA typically. It protects

the part even directly short the output to GND.

Thermal Consideration

Thermal protection limits power dissipation in the RT9022.

When the operating junction temperature exceeds 135

°C,

the OTP circuit starts the thermal shutdown function and

turns the pass element off. The pass element turns on

again after the junction temperature cools by 10

°C.

For continuous operation, do not exceed absolute

maximum operation junction temperature 125

°C. The

power dissipation definition in device is :

PD = (VIN

− VOUT) x IOUT + VIN x IQ

The maximum power dissipation depends on the thermal

resistance of IC package, PCB layout, the rate of

surroundings airflow and temperature difference between

junction to ambient. The maximum power dissipation can

be calculated by following formula :

PD(MAX) = ( TJ(MAX)

− TA ) / θJA

Where TJ(MAX) is the maximum operation junction

temperature 100

°C, TAis the ambient temperature and the

θJA is the junction to ambient thermal resistance.

For recommended operating conditions specification of

the RT9022, where TJ(MAX) is the maximum junction

temperature of the die (100

°C) and TA is the maximum

ambient temperature. The junction to ambient thermal

resistance (

θJA is layout dependent) for T/SOT-23-6

package is 250

°C/W, and SC-70-6 package is 333°C/W

on standard JEDEC 51-3 thermal test board. The

maximum power dissipation at TA= 25

°C can be calculated

by following formula :

PD(MAX) = (100

°C − 25°C) / 250°C/W = 300mW for

T/SOT-23-6 package

PD(MAX) = (100

°C − 25°C) / 333°C/W = 225mW for

SC-70-6 package

The maximum power dissipation depends on operating

ambient temperature for fixed TJ(MAX) and thermal

resistance

θJA. For the RT9022 packages, the Figure 1 of

de-rating curves allows the designer to see the effect of

rising ambient temperature on the maximum power

allowed.

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