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74HC4060 Datasheet(PDF) 3 Page - Silicon Supplies |
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74HC4060 Datasheet(HTML) 3 Page - Silicon Supplies |
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3 / 7 page ![]() Page 3 of 7 www.siliconsupplies.com PARAMETER SYMBOL MIN MAX UNITS DC Supply Voltage VCC 24 6 V DC Input or Output Voltage VIN ,VOUT 0 VCC V Operating Temperature Range TJ 0 +85 °C VCC = 2.0V 0 1000 ns VCC = 4.5V 0 500 Input Rise or Fall Times VCC = 6.0V tr, tf 0 400 Recommended Operating Conditions3 (Voltages referenced to GND) Absolute Maximum Ratings1 PARAMETER SYMBOL VALUE UNIT DC Supply Voltage (Referenced to GND) VCC -0.5 to +7.0 V DC Input Voltage (Referenced to GND) VIN -0.5 to VCC +0.5 V DC Output Voltage VOUT -0.5 to VCC +0.5 V DC Input Current, per pad IIN ±20 mA DC Output Current, per pad IOUT ±25 mA DC VCC or GND Current, per pad ICC ±50 mA Power Dissipation in Still Air 2 PD 750 mW Storage Temperature Range TSTG -65 to 150 °C High Speed CMOS Logic – 74HC4060 Rev 1.0 26/11/17 1. Operation above the absolute maximum rating may cause device failure. Operation at the absolute maximum ratings, for extended periods, may reduce device reliability. 2. Measured in plastic DIP package, results in die form are dependent on die attach and assembly method. Pad Descriptions INPUTS Osc IN (Pad 11) Negative–edge triggering clock input. A high–to–low transition on this input advances the state of the counter. Osc IN may be driven by an external clock source. CONTROL INPUTS MR (Pad 12) Active–high reset. A high level applied to this input asynchronously resets the counter to its zero state (forcing all Q outputs low) and disables the oscillator. OUTPUTS Q4—Q10, Q12–Q14 (Pads 7, 5, 4, 6, 13, 15, 1, 2, 3) Active–high outputs. Each Qn output divides the Clock input frequency by 2 N. The user should note the Q1, Q2, Q3 and Q11 are not available as outputs. Osc OUT1, Osc OUT2 (Pads 9, 10) Oscillator outputs. These pads are used in conjunction with Osc IN and the external components to form an oscillator. When Osc IN is being driven with an external clock source, Osc OUT1 and Osc OUT2 must be left open circuited. With the crystal oscillator in RC configuration, Osc OUT2 must be left open circuited. 3. This device contains protection circuitry to guard against damage due to high static voltages or electric fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this high-impedance circuit. For proper operation, VIN and VOUT should be constrained to the range GND ≤ (VIN or VOUT) ≤ VCC. Unused inputs must always be tied to an appropriate logic voltage level (e.g., either GND or VCC). Unused outputs must be left open. 4. The oscillator is guaranteed to function at 2.5 V minimum. However, parametrics are tested at 2.0V by driving Pad 11 with an external clock source. |
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