Electronic Components Datasheet Search
  English  ▼

X  

LPC2387 Datasheet(PDF) 40 Page - NXP Semiconductors

Part # LPC2387
Description  Single-chip 16-bit/32-bit microcontrollers; 512 kB flash with ISP/IAP, Ethernet, USB 2.0, CAN, and 10-bit ADC/DAC
PDF  47 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  NXP [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo NXP - NXP Semiconductors

LPC2387 Datasheet(HTML) 40 Page - NXP Semiconductors

Back Button LPC2387 Datasheet HTML 36Page - NXP Semiconductors LPC2387 Datasheet HTML 37Page - NXP Semiconductors LPC2387 Datasheet HTML 38Page - NXP Semiconductors LPC2387 Datasheet HTML 39Page - NXP Semiconductors LPC2387 Datasheet HTML 40Page - NXP Semiconductors LPC2387 Datasheet HTML 41Page - NXP Semiconductors LPC2387 Datasheet HTML 42Page - NXP Semiconductors LPC2387 Datasheet HTML 43Page - NXP Semiconductors LPC2387 Datasheet HTML 44Page - NXP Semiconductors Next Button
Zoom Inzoom in Zoom Outzoom out
 40 / 47 page
background image
LPC2387_1
© NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 01.00 — 6 November 2007
40 of 47
NXP Semiconductors
LPC2387
Fast communication chip
10. Dynamic characteristics
[1]
Characterized but not implemented as production test. Guaranteed by design.
[1]
Parameters are valid over operating temperature range unless otherwise specified.
[2]
Typical ratings are not guaranteed. The values listed are at room temperature (25
°C), nominal supply voltages.
[3]
Bus capacitance Cb in pF, from 10 pF to 400 pF.
Table 7.
Dynamic characteristics of USB pins (full-speed)
CL = 50 pF; Rpu = 1.5 kΩ on D+ to VDD(3V3), unless otherwise specified.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
tr
rise time
10 % to 90 %
8.5
-
13.8
ns
tf
fall time
10 % to 90 %
7.7
-
13.7
ns
tFRFM
differential rise and fall time
matching
tr / tf
-
-
109
%
VCRS
output signal crossover voltage
1.3
-
2.0
V
tFEOPT
source SE0 interval of EOP
see Figure 7
160
-
175
ns
tFDEOP
source jitter for differential transition
to SE0 transition
see Figure 7
−2
-
+5
ns
tJR1
receiver jitter to next transition
−18.5
-
+18.5
ns
tJR2
receiver jitter for paired transitions
10 % to 90 %
−9
-
+9
ns
tEOPR1
EOP width at receiver
must reject as
EOP; see
Figure 7
[1] 40
-
-
ns
tEOPR2
EOP width at receiver
must accept as
EOP; see
Figure 7
[1] 82
-
-
ns
Table 8.
Dynamic characteristics
Tamb = −40 °C to +85 °C for commercial applications; VDD(3V3) over specified ranges.[1]
Symbol
Parameter
Conditions
Min
Typ[2]
Max
Unit
External clock
fosc
oscillator frequency
1
-
24
MHz
Tcy(clk)
clock cycle time
42
-
1000
ns
tCHCX
clock HIGH time
Tcy(clk) × 0.4
-
-
ns
tCLCX
clock LOW time
Tcy(clk) × 0.4
-
-
ns
tCLCH
clock rise time
-
-
5
ns
tCHCL
clock fall time
-
-
5
ns
I2C-bus pins (P0[27] and P0[28])
tf(o)
output fall time
VIH to VIL
20 + 0.1
× C
b
[3]
-
-
ns
SSP interface
tsu(SPI_MISO)
SPI_MISO set-up time
Tamb = 25 °C;
measured in
SPI Master
mode; see
Figure 8
-
11
-
ns



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47


Datasheet Download

Go To PDF Page


Link URL



Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Contact us   |   Privacy Policy   |   Link to Datasheet    |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com