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SM5006AKDS Datasheet(PDF) 14 Page - Nippon Precision Circuits Inc |
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SM5006AKDS Datasheet(HTML) 14 Page - Nippon Precision Circuits Inc |
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14 / 19 page  SM5006 series SEIKO NPC CORPORATION —14 5006 ×K series VSS = 0V, Ta = −40 to 85°C unless otherwise noted. 5006AH series VDD = 4.5 to 5.5V, VSS = 0V, Ta = −40 to 85°C unless otherwise noted. Parameter Symbol Condition Rating Unit min typ max Output rise time tr Measurement cct 3, load cct 1, 0.4V to 2.4V, VDD = 4.5 to 5.5V CL = 15pF – 2 4 ns CL = 50pF – – 7 Output fall time tf Measurement cct 3, load cct 1, 2.4V to 0.4V, VDD = 4.5 to 5.5V CL = 15pF – 2 4 ns CL = 50pF – – 7 Output duty cycle*1 *1. The duty cycle characteristic is checked the sample chips of each production lot. Duty Measurement cct 3, load cct 1, Ta = 25 °C, VDD = 5.0V, CL = 15pF f = 30MHz SM5006AKAS CF5006AKA 45–55 % f = 40MHz SM5006AKBS CF5006AKB 45–55 f = 60MHz SM5006AKCS CF5006AKC 40–60 f = 70MHz SM5006AKDS CF5006AKD SM5006BKCS CF5006BKC 45–55 f = 50MHz SM5006DKCS CF5006DKC 45–55 f = 70MHz SM5006CKDS CF5006CKD SM5006DKCS CF5006DKC 40–60 Output disable delay time tPLZ Measurement cct 3, load cct 1, Ta = 25 °C, VDD = 5V, CL ≤ 15pF – – 100 ns Output enable delay time tPZL – – 100 ns Parameter Symbol Condition Rating Unit min typ max Output rise time tr1 Measurement cct 3, load cct 1, 0.1VDD to 0.9VDD CL = 15pF – 5.0 7.0 ns tr2 CL = 50pF – 13 21 Output fall time tf1 Measurement cct 3, load cct 1, 0.9VDD to 0.1VDD CL = 15pF – 5.0 7.0 ns tf2 CL = 50pF – 13 21 Output duty cycle*1 *1. The duty cycle characteristic is checked the sample chips of each production lot. Duty Measurement cct 3, load cct 1, Ta = 25 °C, VDD = 5.0V, CL = 15pF f = 30MHz SM5006AHAS CF5006AHA 45–55 % f = 40MHz SM5006AHBS CF5006AHB 45–55 f = 50MHz SM5006AHCS CF5006AHC 45–55 f = 60MHz, Ta = –20 to 80 °C CF5006AHC 40 – 60 f = 60MHz, Ta = –15 to 75 °C SM5006AHCS 40 – 60 f = 70MHz, Ta = –20 to 80 °C CF5006AHD 40 – 60 f = 70MHz, Ta = –15 to 75 °C SM5006AHDS 40 – 60 Output disable delay time tPLZ Measurement cct 3, load cct 1, Ta = 25 °C, VDD = 5V, CL ≤ 15pF – – 100 ns Output enable delay time tPZL – – 100 ns |
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