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DFPMU floating point instructions per-

formance has been compared to standard C

library functions delivered with every com-

mercial C compiler. Each program was exe-

cuted in the same system environments.

Number of clock periods were measured be-

tween input data loading into work registers

and output result storing after operation. The

results are placed in table below. Improve-

ment has been computed as number of:

(CPU clk) divided by (CPU+DFPMU clk),

required to execute the same operation.

More details are available in core docu-

mentation.

The following table gives a survey about

the DP8051+DFPMU performance compared

to std 8051 microcontroller.

Device

Improvement

80C51

1.0

DP8051

7.3

DP8051+DFPMU

162.0

General performance improvements

1

7,3

162

0

50

100

150

200

80C51

DP8051

DP8051+DFPMU

IEEE-754 FP Instruction

Improvement

Addition

73

Subtraction

60

Multiplication

65

Division

182

Square Root

392

Sine

139

Cosine

144

Tangent

222

Arcs Tangent

182

Average speed improvement:

162

Improvements of particular operations

The table below shows performance im-

provements of the NIOS-II and DFPMU

based system, compared to the same system

without the DFPMU coprocessor.

Device

Improvement

NIOS-II/s

1.0

NIOS-II+DFPMU (arithmetic)

7.5

NIOS-II+DFPMU (trigonometric)

49.2

NIOS-II+DFPMU (overall)

28.3

General performance improvements

1

7,5

49,2

28,3

0

10

20

30

40

50

32-bit NIOS-II/s

NIOS-II+DFPMU (arithmetic)

NIOS-II+DFPMU (trigonometric)

NIOS-II+DFPMU (overall)

IEEE-754 FP Instruction

Improvement

Addition

6.4

Subtraction

6.5

Multiplication

5.1

Division

6.5

Square Root

12.9

Sine

40.8

Cosine

41.3

Tangent

65.0

Arcs Tangent

49.6

Average speed improvement:

28.3

Improvements of particular operations

More details are available in core docu-

mentation.