ADF5612CCCZ datasheet(10/48 Pages) AD

10 / 48 page

Data Sheet

ADF5612

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS

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Rev. 0 | 10 of 48

Table 6. Pin Function Descriptions (Continued)

Pin No.

Mnemonic

Description

SDIO

Serial Data Input/Output; CMOS Input and Output. When configured as an input, the SPI uses this CMOS input for data. In

3-wire mode (default mode), the SDIO pin outputs data from the SPI during a read communication burst.

CSB

Serial Port Chip Select. This CMOS input initiates a SPI communication burst when driven low, ending the burst when

driven back high.

CEN

Chip Enable. This CMOS input enables the device when driven high. A logic low disables the device, putting the device in

a full power-down state causing the register to reset.

DVDD

3.3V ± 5% Digital Power Supply. Retain bias to hold the PLL register contents when powering down the PLL.

XREFP

External Reference Input. For 50Ω match, AC couple to the XREFP pin using a low reactant capacitor value and add a

50Ω resistor to ground.

EPAD

Exposed Pad. The exposed pad or ground paddle on the backside of the package must be tied to DC ground for electrical,

mechanical, and thermal reasons. Note that RF ground and DC ground are the same in this case.

ADF5612CCCZ Datasheet(PDF) 10 Page - Analog Devices