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TMP86FS23UG Datasheet(PDF) 240 Page - Toshiba Semiconductor |
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TMP86FS23UG Datasheet(HTML) 240 Page - Toshiba Semiconductor |
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240 / 252 page ![]() Page 228 20. Input/Output Circuitry 20.2 Input/Output Ports TMP86FS23UG 20.2 Input/Output Ports Port I/O Input/Output Circuitry Remarks P1 I/O Tri-state I/O Hysteresis input R = 100 Ω (typ.) LCD segment output P5 P7 P8 I/O Tri-state I/O R = 100 Ω (typ.) LCD segment output P2 I/O Sink open drain output Hysteresis input R = 100 Ω (typ.) P34 to P30 I/O Sink open drain output or C-MOS output Hysteresis input High current output (Nch) (Only P33, P34 port) R = 100 Ω (typ.) P37 to P35 Output Sink open drain output High current output (Nch) P6 I/O Tri-state I/O Hysteresis input AIN input R = 100 Ω (typ.) Initial "High-Z" Disable SEG output Data output Pin input VDD R Initial "High-Z" Disable SEG output Data output Pin input VDD R Initial "High-Z" Data output Pin input Input from output latch VDD R Initial "High-Z" Input from output latch Pch control Data output Pin input VDD R Initial "High-Z" Data output Input from output latch Initial "High-Z" Disable AIN Data output Pin input VDD R |
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