LR645 datasheet(5/24 Pages) MICROCHIP

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LR645

DS20005384B-page 5

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3.0

FUNCTIONAL DESCRIPTION

3.1

SMPS Start-Up Circuit

One of the main applications for LR645 is a start-up

circuit for off-line, switch-mode power supplies

(SMPS), as shown in Figure 3-1. A minimum output

capacitance of 10 nF is recommended for stability. The

wide operating, input voltage range of LR645 allows

the SMPS to operate and start-up from rectified AC, or

a DC voltage of 15 to 450V, without adjustment.

During start-up, the LR645 powers the VCC line of the

Pulse-Width Modulation (PWM) IC with a nominal

output voltage of 10V. The auxiliary voltage connected

through a diode to the VOUT pin of LR645 will start to

increase. When the auxiliary voltage becomes larger

than the output voltage LR645 turns OFF both its

internal high voltage input line and output voltage,

allowing the auxiliary voltage to power the VCC line of

the PWM IC. After startup, LR645 doesn’t draw any

input current from the high-voltage line other than the

leakage current of the internal MOSFET switch, which

is typically 0.1 µA.

The 3-terminal version shown in Figure 3-1 has load

regulation guaranteed from 0 to 3.0 mA at a fixed

nominal output voltage of 10V. Applications requiring

higher output current and/or a different output voltage

can use the 8 pin adjustable version.

FIGURE 3-1:

SMPS Start-up Circuit.

3.2

High-Current SMPS Start-Up

Circuit

The 8-lead version of LR645 has connections for an

external depletion-mode MOSFET for higher-output

current and external resistors for adjustable-output

voltage. As shown in Figure 3-2, the output current is

increased to 150 mA by using the DN2540, a 400V

depletion-mode MOSFET. The maximum operating

input voltage will be limited by the drain-to-source,

breakdown voltage of the external MOSFET, but can-

not exceed the 450V rating of LR645.

The output voltage can be adjusted from 8 to 12V with

two external resistors: R1 and R2. The ratio of R2/R1

determines the output voltage. R2 is connected

between the VOUT and TRIM pins; R1 is connected

between TRIM and GND pins. Figure 3-3 is a curve

showing output voltage versus resistor ratio R2/R1.

The optimum range for R1 + R2 is 200 kΩ to 300 kΩ.

This minimizes loading and optimizes accuracy of the

output voltage. Figure 3-3 uses an R1 + R2 of 250 kΩ.

FIGURE 3-2:

High-Current SMPS Start-up Circuit.

15 - 450V

5.0V

VAUX = 12V

COUT

CIN

VCC

PWM IC

LR6

GND

VIN

15V

400V

–

5.0V

–

DN2540

COUT

CIN

VCC

AUX = 12V

Note:

When used with the DN25, +VIN is not connected on the LR6.

PWM IC

LR645

VOUT

GND

GATE

TRIM

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