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TC74HC107AF Datasheet(PDF) 4 Page - Toshiba Semiconductor

Part # TC74HC107AF
Description  CMOS Digital Integrated Circuit Silicon Monolithic Dual J-K Flip Flop with Clear
PDF  9 Pages
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Manufacturer  TOSHIBA [Toshiba Semiconductor]
Direct Link  http://www.semicon.toshiba.co.jp/eng
Logo TOSHIBA - Toshiba Semiconductor

TC74HC107AF Datasheet(HTML) 4 Page - Toshiba Semiconductor

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TC74HC107AP/AF/AFN
2007-10-01
4
Timing Requirements (input: tr = tf = 6 ns)
Test Condition
Ta
= 25°C
Ta
=
−40
~85°C
Characteristics
Symbol
VCC (V)
Typ.
Limit
Limit
Unit
Minimum pulse width
(
CK )
tW (L)
tW (H)
⎯
2.0
4.5
6.0
⎯
⎯
⎯
75
15
13
95
19
16
ns
Minimum pulse width
( CLR )
tW (L)
⎯
2.0
4.5
6.0
⎯
⎯
⎯
75
15
13
95
19
16
ns
Minimum set-up time
ts
⎯
2.0
4.5
6.0
⎯
⎯
⎯
75
15
13
95
19
16
ns
Minimum hold time
th
⎯
2.0
4.5
6.0
⎯
⎯
⎯
0
0
0
0
0
0
ns
Minimum removal time
( CLR )
trem
⎯
2.0
4.5
6.0
⎯
⎯
⎯
25
5
5
30
6
5
ns
Clock frequency
f
⎯
2.0
4.5
6.0
⎯
⎯
⎯
6
31
37
5
25
30
MHz
AC Characteristics (CL = 15 pF, VCC = 5 V, Ta = 25°C, input: tr = tf = 6 ns)
Characteristics
Symbol
Test Condition
Min
Typ.
Max
Unit
Output transition time
tTLH
tTHL
⎯
⎯
4
8
ns
Propagation delay time
( CK -Q, Q )
tpLH
tpHL
⎯
⎯
11
21
ns
Propagation delay time
( CLR -Q, Q )
tpLH
tpHL
⎯
⎯
12
24
ns
Maximum clock frequency
fmax
⎯
34
75
⎯
MHz



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