TLP719 datasheet(4/7 Pages) TOSHIBA

4 / 7 page

TLP719

2007-10-01

Switching Characteristics (Ta = 25 °C, VCC = 5 V)

Characteristic

Symbol

Test

Cir-

cuit

Test Condition

Min.

Typ.

Max.

Unit

Propagation delay time

(H→ L)

tpHL

IF = 0→ 16 mA

RL = 1.9kΩ

―

0.8

μs

Propagation delay time

(L→ H)

tpLH

Fig1

IF = 16→ 0 mA

RL = 1.9kΩ

―

0.8

μs

Common mode transient

immunity at logic HIGH output

(Note 8)

CMH

IF = 0 mA

VCM = 400 Vp−p

RL = 1.9kΩ

10000

―

V / μs

Common mode transient

immunity at logic LOW output

(Note 8)

CML

Fig2

IF = 16 mA

VCM = 400 Vp−p

RL = 1.9 kΩ

−10000

―

V / μs

Note 8 : CML is the maximum rate of fall of the common mode voltage that can be sustained with the output voltage in the logic

LOW state (VO < 0.8 V).

CMH is the maximum rate of rise of the common mode voltage that can be sustained with the output voltage in the logic

HIGH state (VO >2 V).

Figure 1. Switching Time Test Circuit

Figure 2. Common Mode Noise Immunity Test Circuit.

MONITORING NODE

VCC = 5 V

IF MONITORING NODE

PULSE INPUT

( PW = 100 μs

Duty = 10%)

0.1

μF

→

10%

90%

CMH

2 V

0.8 V

VOL

SW:A (

IF = 16 mA)

400 V

VCM

0 V

VOH

SW:B (

IF= 0 mA)

CML

CMH = t

r (μs)

320 (V)

CML = − t

f (μs)

320 (V)

tpLH

tpHL

1.5V

VOL

RL=1.9kΩ

VCC=5V

VCM

0.1μF

−

→

SHIELD

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